drm/i915: parameterize SDE hotplug registers

Ice Lake, Tiger Lake and Elkhart Lake all have different port
configurations and all of them can be parameterized the same way to form
the SDE hotplug bitmask. Avoid making them a special case an just use
the parameterized macros.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190829211526.30525-3-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5f590987dcd588140db42f2a707817e97b377b1b..5413828321260474331413996742e5bcc5a6a66b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -149,30 +149,30 @@ static const u32 hpd_gen12[HPD_NUM_PINS] = {
 };
 
 static const u32 hpd_icp[HPD_NUM_PINS] = {
-       [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
-       [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
-       [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
-       [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
-       [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
-       [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
+       [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
+       [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
+       [HPD_PORT_C] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
+       [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
+       [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
+       [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
 };
 
 static const u32 hpd_mcc[HPD_NUM_PINS] = {
-       [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
-       [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
-       [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP
+       [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
+       [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
+       [HPD_PORT_C] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
 };
 
 static const u32 hpd_tgp[HPD_NUM_PINS] = {
-       [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
-       [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
-       [HPD_PORT_C] = SDE_DDIC_HOTPLUG_TGP,
-       [HPD_PORT_D] = SDE_TC1_HOTPLUG_ICP,
-       [HPD_PORT_E] = SDE_TC2_HOTPLUG_ICP,
-       [HPD_PORT_F] = SDE_TC3_HOTPLUG_ICP,
-       [HPD_PORT_G] = SDE_TC4_HOTPLUG_ICP,
-       [HPD_PORT_H] = SDE_TC5_HOTPLUG_TGP,
-       [HPD_PORT_I] = SDE_TC6_HOTPLUG_TGP,
+       [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
+       [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
+       [HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C),
+       [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
+       [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
+       [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
+       [HPD_PORT_G] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
+       [HPD_PORT_H] = SDE_TC_HOTPLUG_ICP(PORT_TC5),
+       [HPD_PORT_I] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
 };
 
 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 946beb9e295e8b509cb7b338fdfcddb1bd767dd7..53735433fe203ff3a0a8eb89e6c1a98cab62e890 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7839,29 +7839,24 @@ enum {
                                 SDE_FDI_RXA_CPT)
 
 /* south display engine interrupt: ICP/TGP */
-#define SDE_TC6_HOTPLUG_TGP            (1 << 29)
-#define SDE_TC5_HOTPLUG_TGP            (1 << 28)
-#define SDE_TC4_HOTPLUG_ICP            (1 << 27)
-#define SDE_TC3_HOTPLUG_ICP            (1 << 26)
-#define SDE_TC2_HOTPLUG_ICP            (1 << 25)
-#define SDE_TC1_HOTPLUG_ICP            (1 << 24)
 #define SDE_GMBUS_ICP                  (1 << 23)
-#define SDE_DDIC_HOTPLUG_TGP           (1 << 18)
-#define SDE_DDIB_HOTPLUG_ICP           (1 << 17)
-#define SDE_DDIA_HOTPLUG_ICP           (1 << 16)
 #define SDE_TC_HOTPLUG_ICP(tc_port)    (1 << ((tc_port) + 24))
 #define SDE_DDI_HOTPLUG_ICP(port)      (1 << ((port) + 16))
-#define SDE_DDI_MASK_ICP               (SDE_DDIB_HOTPLUG_ICP | \
-                                        SDE_DDIA_HOTPLUG_ICP)
-#define SDE_TC_MASK_ICP                        (SDE_TC4_HOTPLUG_ICP |  \
-                                        SDE_TC3_HOTPLUG_ICP |  \
-                                        SDE_TC2_HOTPLUG_ICP |  \
-                                        SDE_TC1_HOTPLUG_ICP)
-#define SDE_DDI_MASK_TGP               (SDE_DDIC_HOTPLUG_TGP | \
-                                        SDE_DDI_MASK_ICP)
-#define SDE_TC_MASK_TGP                        (SDE_TC6_HOTPLUG_TGP |  \
-                                        SDE_TC5_HOTPLUG_TGP |  \
-                                        SDE_TC_MASK_ICP)
+#define SDE_DDI_MASK_ICP               (SDE_DDI_HOTPLUG_ICP(PORT_B) | \
+                                        SDE_DDI_HOTPLUG_ICP(PORT_A))
+#define SDE_TC_MASK_ICP                        (SDE_TC_HOTPLUG_ICP(PORT_TC4) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC3) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC2) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC1))
+#define SDE_DDI_MASK_TGP               (SDE_DDI_HOTPLUG_ICP(PORT_C) | \
+                                        SDE_DDI_HOTPLUG_ICP(PORT_B) | \
+                                        SDE_DDI_HOTPLUG_ICP(PORT_A))
+#define SDE_TC_MASK_TGP                        (SDE_TC_HOTPLUG_ICP(PORT_TC6) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC5) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC4) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC3) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC2) | \
+                                        SDE_TC_HOTPLUG_ICP(PORT_TC1))
 
 #define SDEISR  _MMIO(0xc4000)
 #define SDEIMR  _MMIO(0xc4004)