drm/i915: Mark up early pre-production Kabylakes

Mark A0 as the one and only pre-production variant of Kabylake and
remove its couple of workarounds, consigning them to the annals of
history.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181128135325.10641-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b1d23c73c147cf3779dc6003095fcc7ca8cdf109..e3901671346465e1ca97eb53c44e492ac2bcfa1a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -868,6 +868,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
        pre |= IS_HSW_EARLY_SDV(dev_priv);
        pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);
        pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
+       pre |= IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0);
 
        if (pre) {
                DRM_ERROR("This is a pre-production stepping. "

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 08fd9b12e4d7408b8e2c3d626f921aef7152d012..11f4e6148557a855727fe346914d6c846d362e8f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1401,18 +1401,6 @@ static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)
 
        batch = emit_lri(batch, lri, ARRAY_SIZE(lri));
 
-       /* WaClearSlmSpaceAtContextSwitch:kbl */
-       /* Actual scratch location is at 128 bytes offset */
-       if (IS_KBL_REVID(engine->i915, 0, KBL_REVID_A0)) {
-               batch = gen8_emit_pipe_control(batch,
-                                              PIPE_CONTROL_FLUSH_L3 |
-                                              PIPE_CONTROL_GLOBAL_GTT_IVB |
-                                              PIPE_CONTROL_CS_STALL |
-                                              PIPE_CONTROL_QW_WRITE,
-                                              i915_ggtt_offset(engine->scratch)
-                                              + 2 * CACHELINE_BYTES);
-       }
-
        /* WaMediaPoolStateCmdInWABB:bxt,glk */
        if (HAS_POOLED_EU(engine->i915)) {
                /*

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index ca1f78a42b177cbb90eb04fb44f816a4a96d5a4d..39cd1f823ea9b77cc292f06c596e7f8d56448152 100644 (file)
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -384,11 +384,6 @@ static int kbl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
        if (ret)
                return ret;
 
-       /* WaDisableFenceDestinationToSLM:kbl (pre-prod) */
-       if (IS_KBL_REVID(dev_priv, KBL_REVID_A0, KBL_REVID_A0))
-               WA_SET_BIT_MASKED(HDC_CHICKEN0,
-                                 HDC_FENCE_DEST_SLM_DISABLE);
-
        /* WaToEnableHwFixForPushConstHWBug:kbl */
        if (IS_KBL_REVID(dev_priv, KBL_REVID_C0, REVID_FOREVER))
                WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,