selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1

With the MMCR0 control bit (PMCCEXT) in ISA v3.1, read access to
group B registers is restricted when MMCR0 PMCC=0b00. In other
platforms (like power9), the older behaviour works where group B
PMU SPRs are readable.

Patch creates a selftest which verifies that the test takes a
SIGILL when attempting to read PMU registers via helper function
"dump_ebb_state" for ISA v3.1.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Tested-by: Nageswara R Sastry <rnsastry@linux.ibm.com <mailto:rnsastry@linux.ibm.com>>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1621950703-1532-3-git-send-email-atrajeev@linux.vnet.ibm.com

diff --git a/tools/testing/selftests/powerpc/pmu/ebb/Makefile b/tools/testing/selftests/powerpc/pmu/ebb/Makefile
index c5ecb46340948f05bd22932f98ea7ce5d9c20149..0101606902272c480ab285af0bf91014d1c74d47 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/ebb/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/ebb/Makefile
@@ -24,7 +24,7 @@ TEST_GEN_PROGS := reg_access_test event_attributes_test cycles_test   \
         fork_cleanup_test ebb_on_child_test                    \
         ebb_on_willing_child_test back_to_back_ebbs_test       \
         lost_exception_test no_handler_test                    \
-        cycles_with_mmcr2_test
+        cycles_with_mmcr2_test regs_access_pmccext_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk

diff --git a/tools/testing/selftests/powerpc/pmu/ebb/regs_access_pmccext_test.c b/tools/testing/selftests/powerpc/pmu/ebb/regs_access_pmccext_test.c
new file mode 100644 (file)
index 0000000..1eda8e9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/ebb/regs_access_pmccext_test.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2021, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <setjmp.h>
+#include <signal.h>
+
+#include "ebb.h"
+
+
+/*
+ * Test that closing the EBB event clears MMCR0_PMCC and
+ * sets MMCR0_PMCCEXT preventing further read access to the
+ * group B PMU registers.
+ */
+
+static int regs_access_pmccext(void)
+{
+       struct event event;
+
+       SKIP_IF(!ebb_is_supported());
+
+       event_init_named(&event, 0x1001e, "cycles");
+       event_leader_ebb_init(&event);
+
+       FAIL_IF(event_open(&event));
+
+       ebb_enable_pmc_counting(1);
+       setup_ebb_handler(standard_ebb_callee);
+       ebb_global_enable();
+       FAIL_IF(ebb_event_enable(&event));
+
+       mtspr(SPRN_PMC1, pmc_sample_period(sample_period));
+
+       while (ebb_state.stats.ebb_count < 1)
+               FAIL_IF(core_busy_loop());
+
+       ebb_global_disable();
+       event_close(&event);
+
+       FAIL_IF(ebb_state.stats.ebb_count == 0);
+
+       /*
+        * For ISA v3.1, verify the test takes a SIGILL when reading
+        * PMU regs after the event is closed. With the control bit
+        * in MMCR0 (PMCCEXT) restricting access to group B PMU regs,
+        * sigill is expected.
+        */
+       if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
+               FAIL_IF(catch_sigill(dump_ebb_state));
+       else
+               dump_ebb_state();
+
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(regs_access_pmccext, "regs_access_pmccext");
+}