net/mlx5e: Fix macsec ASO context alignment

[ Upstream commit a6738052b4e3c1a03fcfd31592d71d29db2ae390 ]

Currently mlx5e_macsec_umr struct does not satisfy hardware memory
alignment requirement. Hence the result of querying advanced steering
operation (ASO) is not copied to the memory region as expected.

Fix by satisfying hardware memory alignment requirement and move
context to be first field in struct for better readability.

Fixes: 5f0b138ee960 ("net/mlx5e: Create advanced steering operation (ASO) object for MACsec")
Signed-off-by: Emeel Hakim <ehakim@nvidia.com>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
index b92d541b5286e3aee93f35273a582a16b2d6d2e5..0c23340bfcc75c30f1fbc925dd01a61e0e074853 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
@@ -89,8 +89,8 @@ struct mlx5e_macsec_rx_sc {
 };
 
 struct mlx5e_macsec_umr {
+       u8 __aligned(64) ctx[MLX5_ST_SZ_BYTES(macsec_aso)];
        dma_addr_t dma_addr;
-       u8 ctx[MLX5_ST_SZ_BYTES(macsec_aso)];
        u32 mkey;
 };