PCI: dwc: Use native DWC IP core version representation

Save the DWC IP core version in the same format as the
PORT_LOGIC.PCIE_VERSION_OFF register, similar to what other drivers for DWC
IP do (dw_spi_hw_init(), dwc3_core_is_valid(), stmmac_hwif_init()).

[bhelgaas: trim commit log]
Link: https://lore.kernel.org/r/20220624143947.8991-4-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index c3d88aa27dd435ce72304abd283ba8d8c70ce8b7..c4ab3d775a1806e7c3442c6620ea103846ac6ac7 100644 (file)
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -109,7 +109,7 @@ struct ks_pcie_of_data {
        enum dw_pcie_device_mode mode;
        const struct dw_pcie_host_ops *host_ops;
        const struct dw_pcie_ep_ops *ep_ops;
-       unsigned int version;
+       u32 version;
 };
 
 struct keystone_pcie {
@@ -1069,19 +1069,19 @@ static int ks_pcie_am654_set_mode(struct device *dev,
 
 static const struct ks_pcie_of_data ks_pcie_rc_of_data = {
        .host_ops = &ks_pcie_host_ops,
-       .version = 0x365A,
+       .version = DW_PCIE_VER_365A,
 };
 
 static const struct ks_pcie_of_data ks_pcie_am654_rc_of_data = {
        .host_ops = &ks_pcie_am654_host_ops,
        .mode = DW_PCIE_RC_TYPE,
-       .version = 0x490A,
+       .version = DW_PCIE_VER_490A,
 };
 
 static const struct ks_pcie_of_data ks_pcie_am654_ep_of_data = {
        .ep_ops = &ks_pcie_am654_ep_ops,
        .mode = DW_PCIE_EP_TYPE,
-       .version = 0x490A,
+       .version = DW_PCIE_VER_490A,
 };
 
 static const struct of_device_id ks_pcie_of_match[] = {
@@ -1114,12 +1114,12 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
        struct device_link **link;
        struct gpio_desc *gpiod;
        struct resource *res;
-       unsigned int version;
        void __iomem *base;
        u32 num_viewport;
        struct phy **phy;
        u32 num_lanes;
        char name[10];
+       u32 version;
        int ret;
        int irq;
        int i;
@@ -1233,7 +1233,7 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
                goto err_get_sync;
        }
 
-       if (pci->version >= 0x480A)
+       if (pci->version >= DW_PCIE_VER_480A)
                ret = ks_pcie_am654_set_mode(dev, mode);
        else
                ret = ks_pcie_set_mode(dev);

diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index e66d16a86168322713c633fc8d8429e100ff8273..f10a7d5d94e8630e7b8268dd45d82ce04ebb35d8 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -289,7 +289,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, u8 func_no,
        val = type | PCIE_ATU_FUNC_NUM(func_no);
        if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr))
                val |= PCIE_ATU_INCREASE_REGION_SIZE;
-       if (pci->version == 0x490A)
+       if (pci->version == DW_PCIE_VER_490A)
                val = dw_pcie_enable_ecrc(val);
        dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, val);
        dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
@@ -336,7 +336,7 @@ static void __dw_pcie_prog_outbound_atu(struct dw_pcie *pci, u8 func_no,
                           upper_32_bits(cpu_addr));
        dw_pcie_writel_dbi(pci, PCIE_ATU_LIMIT,
                           lower_32_bits(limit_addr));
-       if (pci->version >= 0x460A)
+       if (pci->version >= DW_PCIE_VER_460A)
                dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_LIMIT,
                                   upper_32_bits(limit_addr));
        dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET,
@@ -345,9 +345,9 @@ static void __dw_pcie_prog_outbound_atu(struct dw_pcie *pci, u8 func_no,
                           upper_32_bits(pci_addr));
        val = type | PCIE_ATU_FUNC_NUM(func_no);
        if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) &&
-           pci->version >= 0x460A)
+           pci->version >= DW_PCIE_VER_460A)
                val |= PCIE_ATU_INCREASE_REGION_SIZE;
-       if (pci->version == 0x490A)
+       if (pci->version == DW_PCIE_VER_490A)
                val = dw_pcie_enable_ecrc(val);
        dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, val);
        dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE);

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 32df3ebccf19f4b8b25ec1368a43080e56c837e6..6b81530fb2ca8f5f1c6135d6cdb2a6645496587f 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -20,6 +20,14 @@
 #include <linux/pci-epc.h>
 #include <linux/pci-epf.h>
 
+/* DWC PCIe IP-core versions (native support since v4.70a) */
+#define DW_PCIE_VER_365A               0x3336352a
+#define DW_PCIE_VER_460A               0x3436302a
+#define DW_PCIE_VER_470A               0x3437302a
+#define DW_PCIE_VER_480A               0x3438302a
+#define DW_PCIE_VER_490A               0x3439302a
+#define DW_PCIE_VER_520A               0x3532302a
+
 /* Parameters for the waiting for link up routine */
 #define LINK_WAIT_MAX_RETRIES          10
 #define LINK_WAIT_USLEEP_MIN           90000
@@ -270,7 +278,7 @@ struct dw_pcie {
        struct dw_pcie_rp       pp;
        struct dw_pcie_ep       ep;
        const struct dw_pcie_ops *ops;
-       unsigned int            version;
+       u32                     version;
        int                     num_lanes;
        int                     link_gen;
        u8                      n_fts[2];

diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 07bc54886d71598548c5643907004875b4584dd3..371b5aa189d1f48c35c4c8e063d0a955691bcb51 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -59,7 +59,7 @@
 #define RESET_INTERVAL_MS              100
 
 struct intel_pcie_soc {
-       unsigned int    pcie_ver;
+       u32     pcie_ver;
 };
 
 struct intel_pcie {
@@ -395,7 +395,7 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = {
 };
 
 static const struct intel_pcie_soc pcie_data = {
-       .pcie_ver =             0x520A,
+       .pcie_ver =             DW_PCIE_VER_520A,
 };
 
 static int intel_pcie_probe(struct platform_device *pdev)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 65135f5c4a4a9acb852ec815c3f278744430122e..f24b30b7454f97dc16fd91875afbde3a16f1b41b 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1979,7 +1979,7 @@ static int tegra194_pcie_probe(struct platform_device *pdev)
        pci->ops = &tegra_dw_pcie_ops;
        pci->n_fts[0] = N_FTS_VAL;
        pci->n_fts[1] = FTS_VAL;
-       pci->version = 0x490A;
+       pci->version = DW_PCIE_VER_490A;
 
        pp = &pci->pp;
        pp->num_vectors = MAX_MSI_IRQS;