powerpc/mm: Pre-filter SRR1 bits before do_page_fault()

By filtering the relevant SRR1 bits in the assembly rather than
in do_page_fault() itself, we avoid a conditional branch (since we
already come from different path for data and instruction faults).

This will allow more simplifications later

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index e22734278458d567f85e6d071fee8fad2b282776..067b843a63a94a69f42ce49857292cd1c058cc0b 100644 (file)
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -409,7 +409,7 @@ InstructionAccess:
        mr      r4,r12                  /* SRR0 is fault address */
        bl      hash_page
 1:     mr      r4,r12
-       mr      r5,r9
+       andis.  r5,r9,0x4820            /* Filter relevant SRR1 bits */
        EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* External interrupt */

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index c032fe8c2d26e49f5be446060556229542992ca2..da3afa2c1658e10aa15dedee68bade4839d040dc 100644 (file)
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -569,8 +569,8 @@ _ENTRY(DTLBMiss_jmp)
 InstructionTLBError:
        EXCEPTION_PROLOG
        mr      r4,r12
-       mr      r5,r9
-       andis.  r10,r5,0x4000
+       andis.  r5,r9,0x4820            /* Filter relevant SRR1 bits */
+       andis.  r10,r9,0x4000
        beq+    1f
        tlbie   r4
 itlbie:

diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index faddc87d0205762c831dc95bf16c749eae928cb9..f04bc9f6b134cc1302178ce7bf927bdbef51aa1b 100644 (file)
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -203,23 +203,13 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
        int code = SEGV_MAPERR;
        int is_write = 0;
-       int trap = TRAP(regs);
-       int is_exec = trap == 0x400;
+       int is_exec = TRAP(regs) == 0x400;
        int is_user = user_mode(regs);
        int fault;
        int rc = 0, store_update_sp = 0;
 
 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
-       /*
-        * Fortunately the bit assignments in SRR1 for an instruction
-        * fault and DSISR for a data fault are mostly the same for the
-        * bits we are interested in.  But there are some bits which
-        * indicate errors in DSISR but can validly be set in SRR1.
-        */
-       if (is_exec)
-               error_code &= 0x48200000;
-       else
-               is_write = error_code & DSISR_ISSTORE;
+       is_write = error_code & DSISR_ISSTORE;
 #else
        is_write = error_code & ESR_DST;
 #endif /* CONFIG_4xx || CONFIG_BOOKE */