fix(imx8m): update poweroff related SNVS_LPCR bits only

Function imx_system_off() writes SNVS_LPCR register to power off the SoC
without bit masking.  This clears other bits like LPWUI_EN and breaks
the function of SoC wake-up using RTC alarm.  Fix it by updating poweroff
related bits only.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Change-Id: If641af4dc1103c67e1a645c03bb36a5f56665aef

diff --git a/plat/imx/imx8m/imx8m_psci_common.c b/plat/imx/imx8m/imx8m_psci_common.c
index 4df4f8edc7b1ce21dc0e17b5debadf789626d007..d396902cd1dfa81ebd4c95fa93787f99d58a4fec 100644 (file)
--- a/plat/imx/imx8m/imx8m_psci_common.c
+++ b/plat/imx/imx8m/imx8m_psci_common.c
@@ -229,8 +229,11 @@ int imx_system_reset2(int is_vendor, int reset_type, u_register_t cookie)
 
 void __dead2 imx_system_off(void)
 {
-       mmio_write_32(IMX_SNVS_BASE + SNVS_LPCR, SNVS_LPCR_SRTC_ENV |
-                       SNVS_LPCR_DP_EN | SNVS_LPCR_TOP);
+       uint32_t val;
+
+       val = mmio_read_32(IMX_SNVS_BASE + SNVS_LPCR);
+       val |= SNVS_LPCR_SRTC_ENV | SNVS_LPCR_DP_EN | SNVS_LPCR_TOP;
+       mmio_write_32(IMX_SNVS_BASE + SNVS_LPCR, val);
 
        while (1)
                ;