clocks = <&scu ASPEED_CLK_MPLL>;
resets = <&rst ASPEED_RESET_SDRAM>;
};
-
- ahb {
- u-boot,dm-pre-reloc;
-
- apb {
- u-boot,dm-pre-reloc;
-
- sdhci0: sdhci@1e740100 {
- compatible = "aspeed,ast2500-sdhci";
- reg = <0x1e740100>;
- #reset-cells = <1>;
- clocks = <&scu ASPEED_CLK_SDIO>;
- resets = <&rst ASPEED_RESET_SDIO>;
- };
-
- sdhci1: sdhci@1e740200 {
- compatible = "aspeed,ast2500-sdhci";
- reg = <0x1e740200>;
- #reset-cells = <1>;
- clocks = <&scu ASPEED_CLK_SDIO>;
- resets = <&rst ASPEED_RESET_SDIO>;
- };
- };
-
- };
};
&uart1 {
reg = <0x1e720000 0x9000>; // 36K
};
+ sdmmc: sd-controller@1e740000 {
+ compatible = "aspeed,ast2500-sd-controller";
+ reg = <0x1e740000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1e740000 0x10000>;
+ clocks = <&scu ASPEED_CLK_GATE_SDCLK>;
+ status = "disabled";
+
+ sdhci0: sdhci@100 {
+ compatible = "aspeed,ast2500-sdhci";
+ reg = <0x100 0x100>;
+ interrupts = <26>;
+ sdhci,auto-cmd12;
+ clocks = <&scu ASPEED_CLK_SDIO>;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@200 {
+ compatible = "aspeed,ast2500-sdhci";
+ reg = <0x200 0x100>;
+ interrupts = <26>;
+ sdhci,auto-cmd12;
+ clocks = <&scu ASPEED_CLK_SDIO>;
+ status = "disabled";
+ };
+ };
+
gpio: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;