cxlflash: shift wrapping bug in afu_link_reset()

"port_sel" is a u64 so the shifting should also be a 64 bit shift.

Fixes: f4e746588c68 ('cxlflash: Base support for IBM CXL Flash Adapter')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Acked-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <JBottomley@Odin.com>

diff --git a/drivers/scsi/cxlflash/main.c b/drivers/scsi/cxlflash/main.c
index fde2ba9342dcb119c61fb1c92df2f1f6a6ef8f82..caa1d09dafec29da4511a96e224f1df4c3f247bb 100644 (file)
--- a/drivers/scsi/cxlflash/main.c
+++ b/drivers/scsi/cxlflash/main.c
@@ -1248,7 +1248,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
 
        /* first switch the AFU to the other links, if any */
        port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
-       port_sel &= ~(1 << port);
+       port_sel &= ~(1ULL << port);
        writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
        cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
 
@@ -1265,7 +1265,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
                       __func__, port);
 
        /* switch back to include this port */
-       port_sel |= (1 << port);
+       port_sel |= (1ULL << port);
        writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
        cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);