iio: adc: imx8qxp: Fix address for command buffer registers

commit 850101b3598277794f92a9e363a60a66e0d42890 upstream.

The ADC Command Buffer Register high and low are currently pointing to
the wrong address and makes it impossible to perform correct
ADC measurements over all channels.

According to the datasheet of the imx8qxp the ADC_CMDL register starts
at address 0x100 and the ADC_CMDH register starts at address 0x104.

This bug seems to be in the kernel since the introduction of this
driver.

This can be observed by checking all raw voltages of the adc and they
are all nearly identical:

cat /sys/bus/iio/devices/iio\:device0/in_voltage*_raw
3498
3494
3491
3491
3489
3490
3490
3490

Fixes: 1e23dcaa1a9fa ("iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC")
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Acked-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/20230904220204.23841-1-embed3d@gmail.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/iio/adc/imx8qxp-adc.c b/drivers/iio/adc/imx8qxp-adc.c
index f5a0fc9e64c542acb4742a5abfb4458685657150..fff6e5a2d956992587a69b35201399763573123e 100644 (file)
--- a/drivers/iio/adc/imx8qxp-adc.c
+++ b/drivers/iio/adc/imx8qxp-adc.c
@@ -38,8 +38,8 @@
 #define IMX8QXP_ADR_ADC_FCTRL          0x30
 #define IMX8QXP_ADR_ADC_SWTRIG         0x34
 #define IMX8QXP_ADR_ADC_TCTRL(tid)     (0xc0 + (tid) * 4)
-#define IMX8QXP_ADR_ADC_CMDH(cid)      (0x100 + (cid) * 8)
-#define IMX8QXP_ADR_ADC_CMDL(cid)      (0x104 + (cid) * 8)
+#define IMX8QXP_ADR_ADC_CMDL(cid)      (0x100 + (cid) * 8)
+#define IMX8QXP_ADR_ADC_CMDH(cid)      (0x104 + (cid) * 8)
 #define IMX8QXP_ADR_ADC_RESFIFO                0x300
 #define IMX8QXP_ADR_ADC_TST            0xffc