]> git.baikalelectronics.ru Git - kernel.git/commitdiff
Revert "PCI: Distribute available resources for root buses, too"
authorBjorn Helgaas <bhelgaas@google.com>
Fri, 14 Oct 2022 18:45:45 +0000 (13:45 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 14 Oct 2022 19:27:58 +0000 (14:27 -0500)
This reverts commit d71c0354f3d8edd991c1cfb3245153deebd1afcd.

Jonathan reported that this commit broke this topology, where all the space
available on bus 02 was assigned to the 02:00.0 bridge window, leaving none
for the e1000 device at 02:00.1:

  pci 0000:00:04.0: bridge window [mem 0x10200000-0x103fffff] to [bus 02-04]
  pci 0000:02:00.0: bridge window [mem 0x10200000-0x103fffff] to [bus 03-04]
  pci 0000:02:00.1: BAR 0: failed to assign [mem size 0x00020000]
  e1000 0000:02:00.1: can't ioremap BAR 0: [??? 0x00000000 flags 0x0]

Link: https://lore.kernel.org/r/20221014124553.0000696f@huawei.com
Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/setup-bus.c

index dc6a30ee6edfba2eb78f8c268b042bb5ed4d7846..b4096598dbcbb9e3aee7079258fd6bc7e06a9450 100644 (file)
@@ -1768,10 +1768,7 @@ static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,
        }
 
        res->end = res->start + new_size - 1;
-
-       /* If the resource is part of the add_list remove it now */
-       if (add_list)
-               remove_from_list(add_list, res);
+       remove_from_list(add_list, res);
 }
 
 static void pci_bus_distribute_available_resources(struct pci_bus *bus,
@@ -1926,8 +1923,6 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
        if (!bridge->is_hotplug_bridge)
                return;
 
-       pci_dbg(bridge, "distributing available resources\n");
-
        /* Take the initial extra resources from the hotplug port */
        available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW];
        available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW];
@@ -1939,59 +1934,6 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
                                               available_mmio_pref);
 }
 
-static bool pci_bridge_resources_not_assigned(struct pci_dev *dev)
-{
-       const struct resource *r;
-
-       /*
-        * Check the child device's resources and if they are not yet
-        * assigned it means we are configuring them (not the boot
-        * firmware) so we should be able to extend the upstream
-        * bridge's (that's the hotplug downstream PCIe port) resources
-        * in the same way we do with the normal hotplug case.
-        */
-       r = &dev->resource[PCI_BRIDGE_IO_WINDOW];
-       if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
-               return false;
-       r = &dev->resource[PCI_BRIDGE_MEM_WINDOW];
-       if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
-               return false;
-       r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
-       if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
-               return false;
-
-       return true;
-}
-
-static void pci_root_bus_distribute_available_resources(struct pci_bus *bus,
-                                                       struct list_head *add_list)
-{
-       struct pci_dev *dev, *bridge = bus->self;
-
-       for_each_pci_bridge(dev, bus) {
-               struct pci_bus *b;
-
-               b = dev->subordinate;
-               if (!b)
-                       continue;
-
-               /*
-                * Need to check "bridge" here too because it is NULL
-                * in case of root bus.
-                */
-               if (bridge && pci_bridge_resources_not_assigned(dev)) {
-                       pci_bridge_distribute_available_resources(bridge, add_list);
-                       /*
-                        * There is only PCIe upstream port on the bus
-                        * so we don't need to go futher.
-                        */
-                       return;
-               }
-
-               pci_root_bus_distribute_available_resources(b, add_list);
-       }
-}
-
 /*
  * First try will not touch PCI bridge res.
  * Second and later try will clear small leaf bridge res.
@@ -2031,8 +1973,6 @@ again:
         */
        __pci_bus_size_bridges(bus, add_list);
 
-       pci_root_bus_distribute_available_resources(bus, add_list);
-
        /* Depth last, allocate resources and update the hardware. */
        __pci_bus_assign_resources(bus, add_list, &fail_head);
        if (add_list)