drm/i915: move watermark structs more towards usage

Shrink i915_drv.h a bit by moving watermark structs where they are
needed.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200227170047.31089-3-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ac5d066e23a0a8d25264b80a8193139e386aef0a..bd37c7058f93f6fb0d73430a4c7111bf7a9c36b8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -641,6 +641,14 @@ struct intel_crtc_scaler_state {
 /* Flag to use the scanline counter instead of the pixel counter */
 #define I915_MODE_FLAG_USE_SCANLINE_COUNTER (1<<2)
 
+struct intel_wm_level {
+       bool enable;
+       u32 pri_val;
+       u32 spr_val;
+       u32 cur_val;
+       u32 fbc_val;
+};
+
 struct intel_pipe_wm {
        struct intel_wm_level wm[5];
        bool fbc_wm_enabled;
@@ -649,6 +657,14 @@ struct intel_pipe_wm {
        bool sprites_scaled;
 };
 
+struct skl_wm_level {
+       u16 min_ddb_alloc;
+       u16 plane_res_b;
+       u8 plane_res_l;
+       bool plane_en;
+       bool ignore_lines;
+};
+
 struct skl_plane_wm {
        struct skl_wm_level wm[8];
        struct skl_wm_level uv_wm[8];

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b5134ff66f03923e9caf6be9b96ea61af532fb8b..9410a4a15eb77e506c9448197be5fd30d3836624 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -59,7 +59,6 @@
 #include <drm/drm_connector.h>
 #include <drm/i915_mei_hdcp_interface.h>
 
-#include "i915_fixed.h"
 #include "i915_params.h"
 #include "i915_reg.h"
 #include "i915_utils.h"
@@ -732,14 +731,6 @@ enum intel_ddb_partitioning {
        INTEL_DDB_PART_5_6, /* IVB+ */
 };
 
-struct intel_wm_level {
-       bool enable;
-       u32 pri_val;
-       u32 spr_val;
-       u32 cur_val;
-       u32 fbc_val;
-};
-
 struct ilk_wm_values {
        u32 wm_pipe[3];
        u32 wm_lp[3];
@@ -798,30 +789,6 @@ static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1,
        return false;
 }
 
-struct skl_wm_level {
-       u16 min_ddb_alloc;
-       u16 plane_res_b;
-       u8 plane_res_l;
-       bool plane_en;
-       bool ignore_lines;
-};
-
-/* Stores plane specific WM parameters */
-struct skl_wm_params {
-       bool x_tiled, y_tiled;
-       bool rc_surface;
-       bool is_planar;
-       u32 width;
-       u8 cpp;
-       u32 plane_pixel_rate;
-       u32 y_min_scanlines;
-       u32 plane_bytes_per_line;
-       uint_fixed_16_16_t plane_blocks_per_line;
-       uint_fixed_16_16_t y_tile_minimum;
-       u32 linetime_us;
-       u32 dbuf_block_size;
-};
-
 struct i915_frontbuffer_tracking {
        spinlock_t lock;
 
@@ -839,13 +806,6 @@ struct i915_virtual_gpu {
        u32 caps;
 };
 
-/* used in computing the new watermarks state */
-struct intel_wm_config {
-       unsigned int num_pipes_active;
-       bool sprites_enabled;
-       bool sprites_scaled;
-};
-
 struct intel_cdclk_config {
        unsigned int cdclk, vco, ref, bypass;
        u8 voltage_level;

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 831e53c137cf0d983f757ab76ccd818371852b51..5aa29f59af1e93661fbcdd31bb900dcc4f00ba3a 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -40,12 +40,36 @@
 #include "gt/intel_llc.h"
 
 #include "i915_drv.h"
+#include "i915_fixed.h"
 #include "i915_irq.h"
 #include "i915_trace.h"
 #include "intel_pm.h"
 #include "intel_sideband.h"
 #include "../../../platform/x86/intel_ips.h"
 
+/* Stores plane specific WM parameters */
+struct skl_wm_params {
+       bool x_tiled, y_tiled;
+       bool rc_surface;
+       bool is_planar;
+       u32 width;
+       u8 cpp;
+       u32 plane_pixel_rate;
+       u32 y_min_scanlines;
+       u32 plane_bytes_per_line;
+       uint_fixed_16_16_t plane_blocks_per_line;
+       uint_fixed_16_16_t y_tile_minimum;
+       u32 linetime_us;
+       u32 dbuf_block_size;
+};
+
+/* used in computing the new watermarks state */
+struct intel_wm_config {
+       unsigned int num_pipes_active;
+       bool sprites_enabled;
+       bool sprites_scaled;
+};
+
 static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
 {
        if (HAS_LLC(dev_priv)) {