]> git.baikalelectronics.ru Git - kernel.git/commitdiff
igb: override two checker warnings
authorJesse Brandeburg <jesse.brandeburg@intel.com>
Fri, 26 Mar 2021 00:38:30 +0000 (17:38 -0700)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Wed, 26 May 2021 16:11:41 +0000 (09:11 -0700)
The igb PTP code was using htons() on a constant to try to
byte swap the value before writing it to a register. This byte
swap has the consequence of triggering sparse conflicts between
the register write which expect cpu ordered input, and the code
which generated a big endian constant. Just override the cast
to make sure code doesn't change but silence the warning.

Can't do a __swab16 in this case because big endian systems
would then write the wrong value.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Dave Switzer <david.switzer@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/igb/igb_ptp.c

index ba61fe9bfaf4e36ad657e4fc18f1f825f24e8f2d..de08ae8db4d51b9f6214b987a551e2f99ae8d509 100644 (file)
@@ -1134,12 +1134,12 @@ static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,
                        | E1000_FTQF_MASK); /* mask all inputs */
                ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
 
-               wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
+               wr32(E1000_IMIR(3), (__force unsigned int)htons(PTP_EV_PORT));
                wr32(E1000_IMIREXT(3),
                     (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
                if (hw->mac.type == e1000_82576) {
                        /* enable source port check */
-                       wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
+                       wr32(E1000_SPQF(3), (__force unsigned int)htons(PTP_EV_PORT));
                        ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
                }
                wr32(E1000_FTQF(3), ftqf);