]> git.baikalelectronics.ru Git - uboot.git/commitdiff
rockchip: Enable bootstage on rockpro64
authorSimon Glass <sjg@chromium.org>
Sat, 7 Jan 2023 21:57:30 +0000 (14:57 -0700)
committerSimon Glass <sjg@chromium.org>
Wed, 18 Jan 2023 18:49:13 +0000 (11:49 -0700)
This board is useful for benchmarking overall U-Boot performance. Enable
the bootstage feature so we get a report.

Since this returns to the boot rom before finishing executing
board_init_r() in SPL, add a few bootstage calls so that we can collect
timing from TPL.

For the stash region, use a portion of SRAM, 64KB below the stack top.
This allows the TPL image to be up to nearly 120KB (it is typically about
64KB). SPL normally runs from SDRAM at 0, so can use the same stash
region.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-rockchip/tpl.c
configs/rockpro64-rk3399_defconfig

index ed46a9ad286c03a223adca505b8a672f676edeaa..fdd0c592b3eb9e43a7a7f1b21d17c383dbca73da 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <debug_uart.h>
 #include <dm.h>
 #include <hang.h>
@@ -70,15 +71,15 @@ void board_init_f(ulong dummy)
                                U_BOOT_TIME ")\n");
 #endif
 #endif
+       /* Init secure timer */
+       rockchip_stimer_init();
+
        ret = spl_early_init();
        if (ret) {
                debug("spl_early_init() failed: %d\n", ret);
                hang();
        }
 
-       /* Init secure timer */
-       rockchip_stimer_init();
-
        /* Init ARM arch timer */
        if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
                timer_init();
@@ -93,6 +94,15 @@ void board_init_f(ulong dummy)
 int board_return_to_bootrom(struct spl_image_info *spl_image,
                            struct spl_boot_device *bootdev)
 {
+#ifdef CONFIG_BOOTSTAGE_STASH
+       int ret;
+
+       bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
+       ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
+                             CONFIG_BOOTSTAGE_STASH_SIZE);
+       if (ret)
+               debug("Failed to stash bootstage: err=%d\n", ret);
+#endif
        back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 
        return 0;
index 6422b9fa7f747dff4539b42695d8f4d14f2ada2c..3b4820ce55fdcbec3ce62193073ddffd3582847e 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_TARGET_ROCKPRO64_RK3399=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e0000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -17,6 +18,12 @@ CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_TPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
+CONFIG_BOOTSTAGE_STASH=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -40,6 +47,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_SPI_FLASH=y