net: ipa: introduce IPA register IDs

Create a new ipa_reg_id enumerated type, which identifies each IPA
register with a symbolic identifier.  Use short names, but in some
cases (such as "BCR") add "IPA_" to the name to help avoid name
conflicts.

Create two functions that indicate register validity.  The first
concisely indicates whether a register is valid for a given version
of IPA, and if so, whether it is defined.  The second indicates
whether a register is valid for TX or RX endpoints.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ipa/ipa_reg.c b/drivers/net/ipa/ipa_reg.c
index e6147a1cd787b661f6e5591c2758fd617c0e74d1..5d432f9c13f0afc1263822f21e712dd1c6c8c2e7 100644 (file)
--- a/drivers/net/ipa/ipa_reg.c
+++ b/drivers/net/ipa/ipa_reg.c
@@ -9,11 +9,69 @@
 #include "ipa.h"
 #include "ipa_reg.h"
 
+/* Is this register valid for the current IPA version? */
+static bool ipa_reg_valid(struct ipa *ipa, enum ipa_reg_id reg_id)
+{
+       enum ipa_version version = ipa->version;
+       bool valid;
+
+       /* Check for bogus (out of range) register IDs */
+       if ((u32)reg_id >= IPA_REG_ID_COUNT)
+               return false;
+
+       switch (reg_id) {
+       case IPA_BCR:
+       case COUNTER_CFG:
+               valid = version < IPA_VERSION_4_5;
+               break;
+
+       case IPA_TX_CFG:
+       case FLAVOR_0:
+       case IDLE_INDICATION_CFG:
+               valid = version >= IPA_VERSION_3_5;
+               break;
+
+       case QTIME_TIMESTAMP_CFG:
+       case TIMERS_XO_CLK_DIV_CFG:
+       case TIMERS_PULSE_GRAN_CFG:
+               valid = version >= IPA_VERSION_4_5;
+               break;
+
+       case SRC_RSRC_GRP_45_RSRC_TYPE:
+       case DST_RSRC_GRP_45_RSRC_TYPE:
+               valid = version <= IPA_VERSION_3_1 ||
+                       version == IPA_VERSION_4_5;
+               break;
+
+       case SRC_RSRC_GRP_67_RSRC_TYPE:
+       case DST_RSRC_GRP_67_RSRC_TYPE:
+               valid = version <= IPA_VERSION_3_1;
+               break;
+
+       case ENDP_FILTER_ROUTER_HSH_CFG:
+               valid = version != IPA_VERSION_4_2;
+               break;
+
+       case IRQ_SUSPEND_EN:
+       case IRQ_SUSPEND_CLR:
+               valid = version >= IPA_VERSION_3_1;
+               break;
+
+       default:
+               valid = true;   /* Others should be defined for all versions */
+               break;
+       }
+
+       return valid;
+}
+
 int ipa_reg_init(struct ipa *ipa)
 {
        struct device *dev = &ipa->pdev->dev;
        struct resource *res;
 
+       (void)ipa_reg_valid;    /* Avoid a warning */
+
        /* Setup IPA register memory  */
        res = platform_get_resource_byname(ipa->pdev, IORESOURCE_MEM,
                                           "ipa-reg");

diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h
index f593cf3187950bf69b075233e100c809c6fd8966..e897550448c06dc56391b27eeb22c5f08d538cf7 100644 (file)
--- a/drivers/net/ipa/ipa_reg.h
+++ b/drivers/net/ipa/ipa_reg.h
@@ -65,6 +65,61 @@ struct ipa;
  * of valid bits for the register.
  */
 
+/* enum ipa_reg_id - IPA register IDs */
+enum ipa_reg_id {
+       COMP_CFG,
+       CLKON_CFG,
+       ROUTE,
+       SHARED_MEM_SIZE,
+       QSB_MAX_WRITES,
+       QSB_MAX_READS,
+       FILT_ROUT_HASH_EN,
+       FILT_ROUT_HASH_FLUSH,
+       STATE_AGGR_ACTIVE,
+       IPA_BCR,                                        /* Not IPA v4.5+ */
+       LOCAL_PKT_PROC_CNTXT,
+       AGGR_FORCE_CLOSE,
+       COUNTER_CFG,                                    /* Not IPA v4.5+ */
+       IPA_TX_CFG,                                     /* IPA v3.5+ */
+       FLAVOR_0,                                       /* IPA v3.5+ */
+       IDLE_INDICATION_CFG,                            /* IPA v3.5+ */
+       QTIME_TIMESTAMP_CFG,                            /* IPA v4.5+ */
+       TIMERS_XO_CLK_DIV_CFG,                          /* IPA v4.5+ */
+       TIMERS_PULSE_GRAN_CFG,                          /* IPA v4.5+ */
+       SRC_RSRC_GRP_01_RSRC_TYPE,
+       SRC_RSRC_GRP_23_RSRC_TYPE,
+       SRC_RSRC_GRP_45_RSRC_TYPE,              /* Not IPA v3.5+, IPA v4.5 */
+       SRC_RSRC_GRP_67_RSRC_TYPE,                      /* Not IPA v3.5+ */
+       DST_RSRC_GRP_01_RSRC_TYPE,
+       DST_RSRC_GRP_23_RSRC_TYPE,
+       DST_RSRC_GRP_45_RSRC_TYPE,              /* Not IPA v3.5+, IPA v4.5 */
+       DST_RSRC_GRP_67_RSRC_TYPE,                      /* Not IPA v3.5+ */
+       ENDP_INIT_CTRL,         /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */
+       ENDP_INIT_CFG,
+       ENDP_INIT_NAT,                  /* TX only */
+       ENDP_INIT_HDR,
+       ENDP_INIT_HDR_EXT,
+       ENDP_INIT_HDR_METADATA_MASK,    /* RX only */
+       ENDP_INIT_MODE,                 /* TX only */
+       ENDP_INIT_AGGR,
+       ENDP_INIT_HOL_BLOCK_EN,         /* RX only */
+       ENDP_INIT_HOL_BLOCK_TIMER,      /* RX only */
+       ENDP_INIT_DEAGGR,               /* TX only */
+       ENDP_INIT_RSRC_GRP,
+       ENDP_INIT_SEQ,                  /* TX only */
+       ENDP_STATUS,
+       ENDP_FILTER_ROUTER_HSH_CFG,                     /* Not IPA v4.2 */
+       /* The IRQ registers are only used for GSI_EE_AP */
+       IPA_IRQ_STTS,
+       IPA_IRQ_EN,
+       IPA_IRQ_CLR,
+       IPA_IRQ_UC,
+       IRQ_SUSPEND_INFO,
+       IRQ_SUSPEND_EN,                                 /* IPA v3.1+ */
+       IRQ_SUSPEND_CLR,                                /* IPA v3.1+ */
+       IPA_REG_ID_COUNT,                               /* Last; not an ID */
+};
+
 #define IPA_REG_COMP_CFG_OFFSET                                0x0000003c
 /* The next field is not supported for IPA v4.0+, not present for IPA v4.5+ */
 #define ENABLE_FMASK                           GENMASK(0, 0)