]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/tgl: Enabling DSC on Pipe A for TGL
authorMadhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Fri, 23 Aug 2019 00:46:55 +0000 (17:46 -0700)
committerManasi Navare <manasi.d.navare@intel.com>
Wed, 28 Aug 2019 20:03:39 +0000 (13:03 -0700)
DSC was not supported on Pipe A for previous platforms. Tigerlake onwards,
all the pipes support DSC. Hence, the DSC and FEC restriction on
Pipe A needs to be removed.

v2: Changes in the logic around removing the restriction around
    Pipe A (Manasi, Lucas)

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823004655.28905-1-madhumitha.tolakanahalli.pradeep@intel.com
drivers/gpu/drm/i915/display/intel_dp.c

index f74594d8d9df74d138b0c02f3c33dacf9cc18602..c9986c7a3f5ba960f9f9f2e2bc2c1a1efa8a1448 100644 (file)
@@ -1737,8 +1737,14 @@ static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-       return INTEL_GEN(dev_priv) >= 11 &&
-               pipe_config->cpu_transcoder != TRANSCODER_A;
+       /* On TGL, FEC is supported on all Pipes */
+       if (INTEL_GEN(dev_priv) >= 12)
+               return true;
+
+       if (IS_GEN(dev_priv, 11) && pipe_config->cpu_transcoder != TRANSCODER_A)
+               return true;
+
+       return false;
 }
 
 static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
@@ -1753,8 +1759,15 @@ static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-       return INTEL_GEN(dev_priv) >= 10 &&
-               pipe_config->cpu_transcoder != TRANSCODER_A;
+       /* On TGL, DSC is supported on all Pipes */
+       if (INTEL_GEN(dev_priv) >= 12)
+               return true;
+
+       if (INTEL_GEN(dev_priv) >= 10 &&
+           pipe_config->cpu_transcoder != TRANSCODER_A)
+               return true;
+
+       return false;
 }
 
 static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,