display); also select one of the supported displays
by defining one of these:
- CONFIG_ATMEL_LCD:
-
- HITACHI TX09D70VM1CCA, 3.5", 240x320.
-
CONFIG_NEC_NL6448AC33:
NEC NL6448AC33-18. Active, color, single scan.
if TARGET_GURNARD
+config GURNARD_SPLASH
+ def_bool y
+
config SYS_BOARD
default "gurnard"
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_LOGO is not set
# CONFIG_VIDEO_BPP32 is not set
+CONFIG_ATMEL_LCD=y
+CONFIG_LCD=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_USB=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP32 is not set
+CONFIG_ATMEL_LCD=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_LCD=y
CONFIG_REGEX=y
CONFIG_USB=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP32 is not set
+CONFIG_ATMEL_LCD=y
+CONFIG_ATMEL_LCD_BGR555=y
CONFIG_LCD=y
CONFIG_JFFS2_NAND=y
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config ATMEL_LCD
+ bool "Atmel LCD panel support"
+ depends on LCD && ARCH_AT91
+
+config ATMEL_LCD_BGR555
+ bool "Display in BGR555 mode"
+ help
+ Use the BGR555 output mode. Otherwise RGB565 is used.
+
config VIDEO_LCD_ORISETECH_OTM8009A
bool "OTM8009A DSI LCD panel support"
depends on DM_VIDEO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_ATMEL_LCD
-#ifdef CONFIG_AT91SAM9261EK
-#define CONFIG_ATMEL_LCD_BGR555
-#endif
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_ATMEL_LCD 1
-#define CONFIG_ATMEL_LCD_BGR555 1
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_ATMEL_LCD
-#define CONFIG_ATMEL_LCD_RGB565
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE 0x70000000
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_ATMEL_LCD 1
-#define CONFIG_ATMEL_LCD_RGB565 1
/* Let board_init_f handle the framebuffer allocation */
#undef CONFIG_FB_ADDR
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_ATMEL_LCD 1
-#define CONFIG_ATMEL_LCD_BGR555 1
/* SDRAM */
#define PHYS_SDRAM 0x20000000
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_ATMEL_LCD 1
-#define CONFIG_ATMEL_LCD_BGR555 1
#define CONFIG_LCD_IN_PSRAM 1
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
-/* LCD */
-#define CONFIG_ATMEL_LCD
-#define CONFIG_GURNARD_SPLASH
-
/* UARTs/Serial console */
/* Boot options */