]> git.baikalelectronics.ru Git - kernel.git/commitdiff
x86/srso: Add IBPB_BRTYPE support
authorBorislav Petkov (AMD) <bp@alien8.de>
Tue, 18 Jul 2023 09:13:40 +0000 (11:13 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 8 Aug 2023 18:03:50 +0000 (20:03 +0200)
Upstream commit: 79113e4060aba744787a81edb9014f2865193854

Add support for the synthetic CPUID flag which "if this bit is 1,
it indicates that MSR 49h (PRED_CMD) bit 0 (IBPB) flushes all branch
type predictions from the CPU branch predictor."

This flag is there so that this capability in guests can be detected
easily (otherwise one would have to track microcode revisions which is
impossible for guests).

It is also needed only for Zen3 and -4. The other two (Zen1 and -2)
always flush branch type predictions by default.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/include/asm/cpufeatures.h
arch/x86/kernel/cpu/bugs.c

index b37563e53df89606173b8caebac3dc8caedfe0dd..1c330be128244862bae4aa078ff0d54dae9e7199 100644 (file)
 #define X86_FEATURE_V_TSC_AUX          (19*32+ 9) /* "" Virtual TSC_AUX */
 #define X86_FEATURE_SME_COHERENT       (19*32+10) /* "" AMD hardware-enforced cache coherency */
 
+#define X86_FEATURE_IBPB_BRTYPE                (20*32+28) /* "" MSR_PRED_CMD[IBPB] flushes all branch type predictions */
+
 /*
  * BUG word(s)
  */
index d691abd65ed77ed9467d84b5e5f12c5d42729472..137565e7f7de46a1927297ba8b43b1bca88926d0 100644 (file)
@@ -2356,10 +2356,20 @@ static void __init srso_select_mitigation(void)
        if (!boot_cpu_has_bug(X86_BUG_SRSO) || cpu_mitigations_off())
                return;
 
-       has_microcode = cpu_has_ibpb_brtype_microcode();
+       /*
+        * The first check is for the kernel running as a guest in order
+        * for guests to verify whether IBPB is a viable mitigation.
+        */
+       has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) || cpu_has_ibpb_brtype_microcode();
        if (!has_microcode) {
                pr_warn("IBPB-extending microcode not applied!\n");
                pr_warn(SRSO_NOTICE);
+       } else {
+               /*
+                * Enable the synthetic (even if in a real CPUID leaf)
+                * flag for guests.
+                */
+               setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
        }
 
        switch (srso_cmd) {