drm/amd/display: Wrap OTG disable workaround with FIFO control

[Why]
The DIO FIFO will underflow if we turn off the OTG before we turn
off the FIFO.

Since this happens as part of the OTG workaround and we don't reset
the FIFO afterwards we see the error persist.

[How]
Add disable FIFO before the disable CRTC and enable FIFO after enabling
the CRTC.

Reviewed-by: Syed Hassan <Syed.Hassan@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index 8559dcd80af041266274c5f479a016d78d829daa..4a15aa7a375fe053b1cc91eb14cc2ca0c4c6c004 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
@@ -130,11 +130,20 @@ static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state
                if (pipe->top_pipe || pipe->prev_odm_pipe)
                        continue;
                if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {
+                       struct stream_encoder *stream_enc = pipe->stream_res.stream_enc;
+
                        if (disable) {
+                               if (stream_enc && stream_enc->funcs->disable_fifo)
+                                       pipe->stream_res.stream_enc->funcs->disable_fifo(stream_enc);
+
                                pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
                                reset_sync_context_for_pipe(dc, context, i);
-                       } else
+                       } else {
                                pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
+
+                               if (stream_enc && stream_enc->funcs->enable_fifo)
+                                       pipe->stream_res.stream_enc->funcs->enable_fifo(stream_enc);
+                       }
                }
        }
 }