drm/nouveau/fifo: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index 0b56a4d3a98ca08b6ed0e2d52729528ef552425f..647b899555f18eddf1cd2399a857bd9c73ea646b 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -60,7 +60,6 @@ struct nvkm_device {
                struct notifier_block nb;
        } acpi;
 
-       struct nvkm_fifo *fifo;
        struct nvkm_gr *gr;
        struct nvkm_engine *ifb;
        struct nvkm_engine *me;
@@ -117,7 +116,6 @@ struct nvkm_device_chip {
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
 
-       int (*fifo    )(struct nvkm_device *, int idx, struct nvkm_fifo **);
        int (*gr      )(struct nvkm_device *, int idx, struct nvkm_gr **);
        int (*ifb     )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*me      )(struct nvkm_device *, int idx, struct nvkm_engine **);

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
index 1e14213221fe29415d49fef1da01dab6450a0ddd..94d25a7b30c4a0a55e08668e245e62a35162e95e 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
@@ -30,4 +30,5 @@ NVKM_LAYOUT_INST(NVKM_ENGINE_CE      , struct nvkm_engine  ,       ce, 9)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_CIPHER  , struct nvkm_engine  ,   cipher)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_DISP    , struct nvkm_disp    ,     disp)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_DMAOBJ  , struct nvkm_dma     ,      dma)
+NVKM_LAYOUT_ONCE(NVKM_ENGINE_FIFO    , struct nvkm_fifo    ,     fifo)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
index 40af8bfb8afa03381c4ff47d3b63ca33890dd726..3b5cf6bf41daa0d6e003141d357a2a5daef702e3 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
@@ -58,22 +58,22 @@ nvkm_fifo_chan_inst(struct nvkm_fifo *, u64 inst, unsigned long *flags);
 struct nvkm_fifo_chan *
 nvkm_fifo_chan_chid(struct nvkm_fifo *, int chid, unsigned long *flags);
 
-int nv04_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int nv10_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int nv17_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int nv40_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int nv50_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int g84_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gf100_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gk104_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gk110_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gk208_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gk20a_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gm107_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gm200_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gm20b_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gp100_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gp10b_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int gv100_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
-int tu102_fifo_new(struct nvkm_device *, int, struct nvkm_fifo **);
+int nv04_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int nv10_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int nv17_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int nv40_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int nv50_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int g84_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gf100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gk104_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gk110_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gk208_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gk20a_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gm107_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gm200_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gm20b_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gp100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gp10b_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int gv100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+int tu102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
index 9cca213abb554d6d5a021be829b2e40422b4dcf9..9f84c5413ffd82a0600940d3259127275cea1e0d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
 #include <core/layout.h>
 #undef NVKM_LAYOUT_ONCE
 #undef NVKM_LAYOUT_INST
-       [NVKM_ENGINE_FIFO    ] = "fifo",
        [NVKM_ENGINE_GR      ] = "gr",
        [NVKM_ENGINE_IFB     ] = "ifb",
        [NVKM_ENGINE_ME      ] = "me",

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index e83cf303c6bc70c6acabd967ae92fa814ff6b333..b87c56800cfe64f64cfbf41019fbcd5d3b224734 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -90,7 +90,7 @@ nv4_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv04_fifo_new,
+       .fifo     = { 0x00000001, nv04_fifo_new },
        .gr = nv04_gr_new,
        .sw = nv04_sw_new,
 };
@@ -111,7 +111,7 @@ nv5_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv04_fifo_new,
+       .fifo     = { 0x00000001, nv04_fifo_new },
        .gr = nv04_gr_new,
        .sw = nv04_sw_new,
 };
@@ -153,7 +153,7 @@ nv11_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv10_fifo_new,
+       .fifo     = { 0x00000001, nv10_fifo_new },
        .gr = nv15_gr_new,
        .sw = nv10_sw_new,
 };
@@ -175,7 +175,7 @@ nv15_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv10_fifo_new,
+       .fifo     = { 0x00000001, nv10_fifo_new },
        .gr = nv15_gr_new,
        .sw = nv10_sw_new,
 };
@@ -197,7 +197,7 @@ nv17_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv17_gr_new,
        .sw = nv10_sw_new,
 };
@@ -219,7 +219,7 @@ nv18_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv17_gr_new,
        .sw = nv10_sw_new,
 };
@@ -241,7 +241,7 @@ nv1a_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv10_fifo_new,
+       .fifo     = { 0x00000001, nv10_fifo_new },
        .gr = nv15_gr_new,
        .sw = nv10_sw_new,
 };
@@ -263,7 +263,7 @@ nv1f_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv17_gr_new,
        .sw = nv10_sw_new,
 };
@@ -285,7 +285,7 @@ nv20_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv20_gr_new,
        .sw = nv10_sw_new,
 };
@@ -307,7 +307,7 @@ nv25_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv25_gr_new,
        .sw = nv10_sw_new,
 };
@@ -329,7 +329,7 @@ nv28_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv25_gr_new,
        .sw = nv10_sw_new,
 };
@@ -351,7 +351,7 @@ nv2a_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv2a_gr_new,
        .sw = nv10_sw_new,
 };
@@ -373,7 +373,7 @@ nv30_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv30_gr_new,
        .sw = nv10_sw_new,
 };
@@ -395,7 +395,7 @@ nv31_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv30_gr_new,
        .mpeg = nv31_mpeg_new,
        .sw = nv10_sw_new,
@@ -418,7 +418,7 @@ nv34_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv34_gr_new,
        .mpeg = nv31_mpeg_new,
        .sw = nv10_sw_new,
@@ -441,7 +441,7 @@ nv35_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv35_gr_new,
        .sw = nv10_sw_new,
 };
@@ -463,7 +463,7 @@ nv36_chipset = {
        .timer    = { 0x00000001, nv04_timer_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv17_fifo_new,
+       .fifo     = { 0x00000001, nv17_fifo_new },
        .gr = nv35_gr_new,
        .mpeg = nv31_mpeg_new,
        .sw = nv10_sw_new,
@@ -488,7 +488,7 @@ nv40_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv40_mpeg_new,
        .pm = nv40_pm_new,
@@ -514,7 +514,7 @@ nv41_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv40_mpeg_new,
        .pm = nv40_pm_new,
@@ -540,7 +540,7 @@ nv42_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv40_mpeg_new,
        .pm = nv40_pm_new,
@@ -566,7 +566,7 @@ nv43_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv40_mpeg_new,
        .pm = nv40_pm_new,
@@ -592,7 +592,7 @@ nv44_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -618,7 +618,7 @@ nv45_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -644,7 +644,7 @@ nv46_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -670,7 +670,7 @@ nv47_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -696,7 +696,7 @@ nv49_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -722,7 +722,7 @@ nv4a_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -748,7 +748,7 @@ nv4b_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv40_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -774,7 +774,7 @@ nv4c_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -800,7 +800,7 @@ nv4e_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -829,7 +829,7 @@ nv50_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv50_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = nv50_fifo_new,
+       .fifo     = { 0x00000001, nv50_fifo_new },
        .gr = nv50_gr_new,
        .mpeg = nv50_mpeg_new,
        .pm = nv50_pm_new,
@@ -855,7 +855,7 @@ nv63_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -881,7 +881,7 @@ nv67_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -907,7 +907,7 @@ nv68_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, nv04_disp_new },
        .dma      = { 0x00000001, nv04_dma_new },
-       .fifo = nv40_fifo_new,
+       .fifo     = { 0x00000001, nv40_fifo_new },
        .gr = nv44_gr_new,
        .mpeg = nv44_mpeg_new,
        .pm = nv40_pm_new,
@@ -938,7 +938,7 @@ nv84_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, g84_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = g84_pm_new,
@@ -970,7 +970,7 @@ nv86_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, g84_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = g84_pm_new,
@@ -1002,7 +1002,7 @@ nv92_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, g84_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = g84_pm_new,
@@ -1034,7 +1034,7 @@ nv94_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, g94_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = g84_pm_new,
@@ -1066,7 +1066,7 @@ nv96_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, g94_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = g84_pm_new,
@@ -1096,7 +1096,7 @@ nv98_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, g94_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = g84_gr_new,
        .mspdec = g98_mspdec_new,
        .msppp = g98_msppp_new,
@@ -1130,7 +1130,7 @@ nva0_chipset = {
        .cipher   = { 0x00000001, g84_cipher_new },
        .disp     = { 0x00000001, gt200_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = gt200_gr_new,
        .mpeg = g84_mpeg_new,
        .pm = gt200_pm_new,
@@ -1162,7 +1162,7 @@ nva3_chipset = {
        .ce       = { 0x00000001, gt215_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = gt215_gr_new,
        .mpeg = g84_mpeg_new,
        .mspdec = gt215_mspdec_new,
@@ -1196,7 +1196,7 @@ nva5_chipset = {
        .ce       = { 0x00000001, gt215_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = gt215_gr_new,
        .mspdec = gt215_mspdec_new,
        .msppp = gt215_msppp_new,
@@ -1229,7 +1229,7 @@ nva8_chipset = {
        .ce       = { 0x00000001, gt215_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = gt215_gr_new,
        .mspdec = gt215_mspdec_new,
        .msppp = gt215_msppp_new,
@@ -1260,7 +1260,7 @@ nvaa_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, mcp77_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = gt200_gr_new,
        .mspdec = g98_mspdec_new,
        .msppp = g98_msppp_new,
@@ -1292,7 +1292,7 @@ nvac_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .disp     = { 0x00000001, mcp77_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = mcp79_gr_new,
        .mspdec = g98_mspdec_new,
        .msppp = g98_msppp_new,
@@ -1326,7 +1326,7 @@ nvaf_chipset = {
        .ce       = { 0x00000001, gt215_ce_new },
        .disp     = { 0x00000001, mcp89_disp_new },
        .dma      = { 0x00000001, nv50_dma_new },
-       .fifo = g84_fifo_new,
+       .fifo     = { 0x00000001, g84_fifo_new },
        .gr = mcp89_gr_new,
        .mspdec = gt215_mspdec_new,
        .msppp = gt215_msppp_new,
@@ -1362,7 +1362,7 @@ nvc0_chipset = {
        .ce       = { 0x00000003, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf100_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1398,7 +1398,7 @@ nvc1_chipset = {
        .ce       = { 0x00000001, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf108_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1434,7 +1434,7 @@ nvc3_chipset = {
        .ce       = { 0x00000001, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf104_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1470,7 +1470,7 @@ nvc4_chipset = {
        .ce       = { 0x00000003, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf104_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1506,7 +1506,7 @@ nvc8_chipset = {
        .ce       = { 0x00000003, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf110_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1542,7 +1542,7 @@ nvce_chipset = {
        .ce       = { 0x00000003, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf104_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1578,7 +1578,7 @@ nvcf_chipset = {
        .ce       = { 0x00000001, gf100_ce_new },
        .disp     = { 0x00000001, gt215_disp_new },
        .dma      = { 0x00000001, gf100_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf104_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1613,7 +1613,7 @@ nvd7_chipset = {
        .ce       = { 0x00000001, gf100_ce_new },
        .disp     = { 0x00000001, gf119_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf117_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1649,7 +1649,7 @@ nvd9_chipset = {
        .ce       = { 0x00000001, gf100_ce_new },
        .disp     = { 0x00000001, gf119_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gf100_fifo_new,
+       .fifo     = { 0x00000001, gf100_fifo_new },
        .gr = gf119_gr_new,
        .mspdec = gf100_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1686,7 +1686,7 @@ nve4_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk104_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk104_fifo_new,
+       .fifo     = { 0x00000001, gk104_fifo_new },
        .gr = gk104_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1723,7 +1723,7 @@ nve6_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk104_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk104_fifo_new,
+       .fifo     = { 0x00000001, gk104_fifo_new },
        .gr = gk104_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1760,7 +1760,7 @@ nve7_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk104_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk104_fifo_new,
+       .fifo     = { 0x00000001, gk104_fifo_new },
        .gr = gk104_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1788,7 +1788,7 @@ nvea_chipset = {
        .volt     = { 0x00000001, gk20a_volt_new },
        .ce       = { 0x00000004, gk104_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk20a_fifo_new,
+       .fifo     = { 0x00000001, gk20a_fifo_new },
        .gr = gk20a_gr_new,
        .pm = gk104_pm_new,
        .sw = gf100_sw_new,
@@ -1822,7 +1822,7 @@ nvf0_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk110_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk110_fifo_new,
+       .fifo     = { 0x00000001, gk110_fifo_new },
        .gr = gk110_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1858,7 +1858,7 @@ nvf1_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk110_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk110_fifo_new,
+       .fifo     = { 0x00000001, gk110_fifo_new },
        .gr = gk110b_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1894,7 +1894,7 @@ nv106_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk110_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk208_fifo_new,
+       .fifo     = { 0x00000001, gk208_fifo_new },
        .gr = gk208_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1930,7 +1930,7 @@ nv108_chipset = {
        .ce       = { 0x00000007, gk104_ce_new },
        .disp     = { 0x00000001, gk110_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gk208_fifo_new,
+       .fifo     = { 0x00000001, gk208_fifo_new },
        .gr = gk208_gr_new,
        .mspdec = gk104_mspdec_new,
        .msppp = gf100_msppp_new,
@@ -1966,7 +1966,7 @@ nv117_chipset = {
        .ce       = { 0x00000005, gm107_ce_new },
        .disp     = { 0x00000001, gm107_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm107_fifo_new,
+       .fifo     = { 0x00000001, gm107_fifo_new },
        .gr = gm107_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2001,7 +2001,7 @@ nv118_chipset = {
        .ce       = { 0x00000005, gm107_ce_new },
        .disp     = { 0x00000001, gm107_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm107_fifo_new,
+       .fifo     = { 0x00000001, gm107_fifo_new },
        .gr = gm107_gr_new,
        .sw = gf100_sw_new,
 };
@@ -2034,7 +2034,7 @@ nv120_chipset = {
        .ce       = { 0x00000007, gm200_ce_new },
        .disp     = { 0x00000001, gm200_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm200_fifo_new,
+       .fifo     = { 0x00000001, gm200_fifo_new },
        .gr = gm200_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2070,7 +2070,7 @@ nv124_chipset = {
        .ce       = { 0x00000007, gm200_ce_new },
        .disp     = { 0x00000001, gm200_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm200_fifo_new,
+       .fifo     = { 0x00000001, gm200_fifo_new },
        .gr = gm200_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2106,7 +2106,7 @@ nv126_chipset = {
        .ce       = { 0x00000007, gm200_ce_new },
        .disp     = { 0x00000001, gm200_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm200_fifo_new,
+       .fifo     = { 0x00000001, gm200_fifo_new },
        .gr = gm200_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2133,7 +2133,7 @@ nv12b_chipset = {
        .volt     = { 0x00000001, gm20b_volt_new },
        .ce       = { 0x00000004, gm200_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gm20b_fifo_new,
+       .fifo     = { 0x00000001, gm20b_fifo_new },
        .gr = gm20b_gr_new,
        .sw = gf100_sw_new,
 };
@@ -2164,7 +2164,7 @@ nv130_chipset = {
        .ce       = { 0x0000003f, gp100_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
        .disp     = { 0x00000001, gp100_disp_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp100_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2199,7 +2199,7 @@ nv132_chipset = {
        .ce       = { 0x0000000f, gp102_ce_new },
        .disp     = { 0x00000001, gp102_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2234,7 +2234,7 @@ nv134_chipset = {
        .ce       = { 0x0000000f, gp102_ce_new },
        .disp     = { 0x00000001, gp102_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp104_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2269,7 +2269,7 @@ nv136_chipset = {
        .ce       = { 0x0000000f, gp102_ce_new },
        .disp     = { 0x00000001, gp102_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp104_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2303,7 +2303,7 @@ nv137_chipset = {
        .ce       = { 0x0000000f, gp102_ce_new },
        .disp     = { 0x00000001, gp102_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp107_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2338,7 +2338,7 @@ nv138_chipset = {
        .ce       = { 0x0000000f, gp102_ce_new },
        .disp     = { 0x00000001, gp102_disp_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp100_fifo_new,
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr = gp108_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .sec2 = gp108_sec2_new,
@@ -2364,7 +2364,7 @@ nv13b_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x00000001, gp100_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo = gp10b_fifo_new,
+       .fifo     = { 0x00000001, gp10b_fifo_new },
        .gr = gp10b_gr_new,
        .sw = gf100_sw_new,
 };
@@ -2396,7 +2396,7 @@ nv140_chipset = {
        .ce       = { 0x000001ff, gv100_ce_new },
        .disp     = { 0x00000001, gv100_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = gv100_fifo_new,
+       .fifo     = { 0x00000001, gv100_fifo_new },
        .gr = gv100_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2432,7 +2432,7 @@ nv162_chipset = {
        .ce       = { 0x0000001f, tu102_ce_new },
        .disp     = { 0x00000001, tu102_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = tu102_fifo_new,
+       .fifo     = { 0x00000001, tu102_fifo_new },
        .gr = tu102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2466,7 +2466,7 @@ nv164_chipset = {
        .ce       = { 0x0000001f, tu102_ce_new },
        .disp     = { 0x00000001, tu102_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = tu102_fifo_new,
+       .fifo     = { 0x00000001, tu102_fifo_new },
        .gr = tu102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvdec[1] = gm107_nvdec_new,
@@ -2501,7 +2501,7 @@ nv166_chipset = {
        .ce       = { 0x0000001f, tu102_ce_new },
        .disp     = { 0x00000001, tu102_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = tu102_fifo_new,
+       .fifo     = { 0x00000001, tu102_fifo_new },
        .gr = tu102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvdec[1] = gm107_nvdec_new,
@@ -2537,7 +2537,7 @@ nv167_chipset = {
        .ce       = { 0x0000001f, tu102_ce_new },
        .disp     = { 0x00000001, tu102_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = tu102_fifo_new,
+       .fifo     = { 0x00000001, tu102_fifo_new },
        .gr = tu102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -2571,7 +2571,7 @@ nv168_chipset = {
        .ce       = { 0x0000001f, tu102_ce_new },
        .disp     = { 0x00000001, tu102_disp_new },
        .dma      = { 0x00000001, gv100_dma_new },
-       .fifo = tu102_fifo_new,
+       .fifo     = { 0x00000001, tu102_fifo_new },
        .gr = tu102_gr_new,
        .nvdec[0] = gm107_nvdec_new,
        .nvenc[0] = gm107_nvenc_new,
@@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-               _(NVKM_ENGINE_FIFO    ,     fifo);
                _(NVKM_ENGINE_GR      ,       gr);
                _(NVKM_ENGINE_IFB     ,      ifb);
                _(NVKM_ENGINE_ME      ,       me);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
index 8ab4937ea193ac69647b15980e10451f9e16a25f..d4061ef90ec80a623e78a53a59a52d387773adaa 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
@@ -352,7 +352,7 @@ nvkm_fifo = {
 
 int
 nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device,
-              int index, int nr, struct nvkm_fifo *fifo)
+              enum nvkm_subdev_type type, int inst, int nr, struct nvkm_fifo *fifo)
 {
        int ret;
 
@@ -367,7 +367,7 @@ nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device,
                fifo->nr = nr;
        bitmap_clear(fifo->mask, 0, fifo->nr);
 
-       ret = nvkm_engine_ctor(&nvkm_fifo, device, index, true, &fifo->engine);
+       ret = nvkm_engine_ctor(&nvkm_fifo, device, type, inst, true, &fifo->engine);
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
index ff7b529764fe03935a50f7d66b30e25d4497999b..c45779b1d50a7b631b0743628d6b021bc415354c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
@@ -56,7 +56,8 @@ g84_fifo = {
 };
 
 int
-g84_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+g84_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+            struct nvkm_fifo **pfifo)
 {
-       return nv50_fifo_new_(&g84_fifo, device, index, pfifo);
+       return nv50_fifo_new_(&g84_fifo, device, type, inst, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
index 4811cd30f0a3722e67f6a24a0e1aa82935f11bec..3f732b0a8973149b13c9cba5335b9183f1a563e3 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
@@ -682,7 +682,8 @@ gf100_fifo = {
 };
 
 int
-gf100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gf100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
        struct gf100_fifo *fifo;
 
@@ -692,5 +693,5 @@ gf100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
        INIT_WORK(&fifo->recover.work, gf100_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&gf100_fifo, device, index, 128, &fifo->base);
+       return nvkm_fifo_ctor(&gf100_fifo, device, type, inst, 128, &fifo->base);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
index 25425f7311034e0373bd147bb68c874e2169304e..80cd2ea6fe5585f62380f3552c0c7d00a9a36254 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -1029,7 +1029,7 @@ gk104_fifo_ = {
 
 int
 gk104_fifo_new_(const struct gk104_fifo_func *func, struct nvkm_device *device,
-               int index, int nr, struct nvkm_fifo **pfifo)
+               enum nvkm_subdev_type type, int inst, int nr, struct nvkm_fifo **pfifo)
 {
        struct gk104_fifo *fifo;
 
@@ -1039,7 +1039,7 @@ gk104_fifo_new_(const struct gk104_fifo_func *func, struct nvkm_device *device,
        INIT_WORK(&fifo->recover.work, gk104_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&gk104_fifo_, device, index, nr, &fifo->base);
+       return nvkm_fifo_ctor(&gk104_fifo_, device, type, inst, nr, &fifo->base);
 }
 
 const struct nvkm_enum
@@ -1178,7 +1178,8 @@ gk104_fifo = {
 };
 
 int
-gk104_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gk104_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk104_fifo, device, index, 4096, pfifo);
+       return gk104_fifo_new_(&gk104_fifo, device, type, inst, 4096, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
index 4398b340e514b8b5582709c28a642ecaaea76c80..3418ade2146f9323f4262b16db40f164f592033c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
@@ -99,7 +99,7 @@ struct gk104_fifo_engine_status {
        } prev, next, *chan;
 };
 
-int gk104_fifo_new_(const struct gk104_fifo_func *, struct nvkm_device *,
+int gk104_fifo_new_(const struct gk104_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type,
                    int index, int nr, struct nvkm_fifo **);
 void gk104_fifo_runlist_insert(struct gk104_fifo *, struct gk104_fifo_chan *);
 void gk104_fifo_runlist_remove(struct gk104_fifo *, struct gk104_fifo_chan *);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
index f820969e4405df8908298bcef62d2a928f74b1c5..915278c7e0128c8feaa4dbbaa03404693e1e0fe7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
@@ -60,7 +60,8 @@ gk110_fifo = {
 };
 
 int
-gk110_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gk110_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk110_fifo, device, index, 4096, pfifo);
+       return gk104_fifo_new_(&gk110_fifo, device, type, inst, 4096, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c
index 2f54787b5fd0b4285d021514f41ab0541b5e2225..cb703693de52c0d52681367376e27cf41f715bdc 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c
@@ -57,7 +57,8 @@ gk208_fifo = {
 };
 
 int
-gk208_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gk208_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk208_fifo, device, index, 1024, pfifo);
+       return gk104_fifo_new_(&gk208_fifo, device, type, inst, 1024, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
index a814c4e0ed3e5ebff69518833d54dc6a92407394..6e35cf44c640f8de9364fe7185d4f7f2fbfca469 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
@@ -38,7 +38,8 @@ gk20a_fifo = {
 };
 
 int
-gk20a_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gk20a_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk20a_fifo, device, index, 128, pfifo);
+       return gk104_fifo_new_(&gk20a_fifo, device, type, inst, 128, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
index c2a2e4572f6cb1a54d6f8ccd673f08dc1e813ce3..7af6e687d47491d83af7954f499ffbeafe1b580f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
@@ -106,7 +106,8 @@ gm107_fifo = {
 };
 
 int
-gm107_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gm107_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gm107_fifo, device, index, 2048, pfifo);
+       return gk104_fifo_new_(&gm107_fifo, device, type, inst, 2048, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c
index b8cfe3b28c4fd5302a682b41bd6314667d39df93..573658cb6c73f4c4c9cb03965c44f9eaf6cd9e11 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c
@@ -54,7 +54,8 @@ gm200_fifo = {
 };
 
 int
-gm200_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gm200_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gm200_fifo, device, index, 4096, pfifo);
+       return gk104_fifo_new_(&gm200_fifo, device, type, inst, 4096, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c
index 70b4feebc1faca571b0db72e3bcc4844439a16cc..556c97e54f143fb0394f9e21d7e277cd8b9a2b2b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c
@@ -38,7 +38,8 @@ gm20b_fifo = {
 };
 
 int
-gm20b_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gm20b_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gm20b_fifo, device, index, 512, pfifo);
+       return gk104_fifo_new_(&gm20b_fifo, device, type, inst, 512, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
index 2c7a0176b3c840a13a3e50742cb460d1f0bd58f8..6b46b6b65b87724ad73158a38420be93a46a0c86 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
@@ -91,7 +91,8 @@ gp100_fifo = {
 };
 
 int
-gp100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gp100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gp100_fifo, device, index, 4096, pfifo);
+       return gk104_fifo_new_(&gp100_fifo, device, type, inst, 4096, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c
index 8c65ad4feedbeb0bbf1bb5c44369a415672c5267..7a5929cb4d29b8ad737caef43ea93c559766eac7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c
@@ -39,7 +39,8 @@ gp10b_fifo = {
 };
 
 int
-gp10b_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gp10b_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gp10b_fifo, device, index, 512, pfifo);
+       return gk104_fifo_new_(&gp10b_fifo, device, type, inst, 512, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
index 6ee1bb32a071c0bd9c51e0cf3063049d206e06f2..70e16a91ac12ad6b3ddaf577b20479e16e6eaf64 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
@@ -301,7 +301,8 @@ gv100_fifo = {
 };
 
 int
-gv100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+gv100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gv100_fifo, device, index, 4096, pfifo);
+       return gk104_fifo_new_(&gv100_fifo, device, type, inst, 4096, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
index c1d1b1aa5bc662afef97f383eff8cd2959d6c482..d30da0f45675a338182d104a969f2d46dd6c3184 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
@@ -326,7 +326,7 @@ nv04_fifo_init(struct nvkm_fifo *base)
 
 int
 nv04_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
-              int index, int nr, const struct nv04_fifo_ramfc *ramfc,
+              enum nvkm_subdev_type type, int inst, int nr, const struct nv04_fifo_ramfc *ramfc,
               struct nvkm_fifo **pfifo)
 {
        struct nv04_fifo *fifo;
@@ -337,7 +337,7 @@ nv04_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
        fifo->ramfc = ramfc;
        *pfifo = &fifo->base;
 
-       ret = nvkm_fifo_ctor(func, device, index, nr, &fifo->base);
+       ret = nvkm_fifo_ctor(func, device, type, inst, nr, &fifo->base);
        if (ret)
                return ret;
 
@@ -358,8 +358,8 @@ nv04_fifo = {
 };
 
 int
-nv04_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+nv04_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_fifo **pfifo)
 {
-       return nv04_fifo_new_(&nv04_fifo, device, index, 16,
-                             nv04_fifo_ramfc, pfifo);
+       return nv04_fifo_new_(&nv04_fifo, device, type, inst, 16, nv04_fifo_ramfc, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.h
index e5ecceee77ae768d6da413a9b53fa6da48041c14..3f23bcde4a540cc3c9a4384744f675120d08a023 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.h
@@ -17,8 +17,7 @@ struct nv04_fifo {
        const struct nv04_fifo_ramfc *ramfc;
 };
 
-int nv04_fifo_new_(const struct nvkm_fifo_func *, struct nvkm_device *,
-                  int index, int nr, const struct nv04_fifo_ramfc *,
-                  struct nvkm_fifo **);
+int nv04_fifo_new_(const struct nvkm_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  int nr, const struct nv04_fifo_ramfc *, struct nvkm_fifo **);
 void nv04_fifo_init(struct nvkm_fifo *);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
index f9a87deb2b3dc3fd1f11e926bdb1bec17cf56b2b..c464cc0fc292a480369b702fde8e222c6099b406 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
@@ -52,8 +52,8 @@ nv10_fifo = {
 };
 
 int
-nv10_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+nv10_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_fifo **pfifo)
 {
-       return nv04_fifo_new_(&nv10_fifo, device, index, 32,
-                             nv10_fifo_ramfc, pfifo);
+       return nv04_fifo_new_(&nv10_fifo, device, type, inst, 32, nv10_fifo_ramfc, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
index f6d383a21222e07b48ea569801ae227ba734c6b4..ac43b16b94a4b23b585fb4f73d50d1d63eb21c07 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
@@ -90,8 +90,8 @@ nv17_fifo = {
 };
 
 int
-nv17_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+nv17_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_fifo **pfifo)
 {
-       return nv04_fifo_new_(&nv17_fifo, device, index, 32,
-                             nv17_fifo_ramfc, pfifo);
+       return nv04_fifo_new_(&nv17_fifo, device, type, inst, 32, nv17_fifo_ramfc, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
index 2d61fd832ddb0d882d223b3073dd4fcc3cdb7009..0f6710c528a58f5700da371c9dcc320b0189f10e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
@@ -121,8 +121,8 @@ nv40_fifo = {
 };
 
 int
-nv40_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+nv40_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_fifo **pfifo)
 {
-       return nv04_fifo_new_(&nv40_fifo, device, index, 32,
-                             nv40_fifo_ramfc, pfifo);
+       return nv04_fifo_new_(&nv40_fifo, device, type, inst, 32, nv40_fifo_ramfc, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
index c42a181adc1c87b08b339ff094872cf3511f6bc7..59b4ece3f71e7720469dead21f2506aa980f02ca 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
@@ -107,7 +107,7 @@ nv50_fifo_dtor(struct nvkm_fifo *base)
 
 int
 nv50_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
-              int index, struct nvkm_fifo **pfifo)
+              enum nvkm_subdev_type type, int inst, struct nvkm_fifo **pfifo)
 {
        struct nv50_fifo *fifo;
        int ret;
@@ -116,7 +116,7 @@ nv50_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
                return -ENOMEM;
        *pfifo = &fifo->base;
 
-       ret = nvkm_fifo_ctor(func, device, index, 128, &fifo->base);
+       ret = nvkm_fifo_ctor(func, device, type, inst, 128, &fifo->base);
        if (ret)
                return ret;
 
@@ -141,7 +141,8 @@ nv50_fifo = {
 };
 
 int
-nv50_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+nv50_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_fifo **pfifo)
 {
-       return nv50_fifo_new_(&nv50_fifo, device, index, pfifo);
+       return nv50_fifo_new_(&nv50_fifo, device, type, inst, pfifo);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h
index 87d30b6bd2ea8f929a97b2dd24f3ab83a53109f0..0111e7e5a4e38802d2aba577dcd5c0ea2f462599 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h
@@ -10,8 +10,8 @@ struct nv50_fifo {
        int cur_runlist;
 };
 
-int nv50_fifo_new_(const struct nvkm_fifo_func *, struct nvkm_device *,
-                  int index, struct nvkm_fifo **);
+int nv50_fifo_new_(const struct nvkm_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  struct nvkm_fifo **);
 
 void *nv50_fifo_dtor(struct nvkm_fifo *);
 int nv50_fifo_oneinit(struct nvkm_fifo *);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
index 0ef8baab513e5ff4e8411da035d72b8994e53454..da548bab0f2f5583df709a0e61449a75e5bfdf96 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
@@ -4,8 +4,8 @@
 #define nvkm_fifo(p) container_of((p), struct nvkm_fifo, engine)
 #include <engine/fifo.h>
 
-int nvkm_fifo_ctor(const struct nvkm_fifo_func *, struct nvkm_device *,
-                  int index, int nr, struct nvkm_fifo *);
+int nvkm_fifo_ctor(const struct nvkm_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  int nr, struct nvkm_fifo *);
 void nvkm_fifo_uevent(struct nvkm_fifo *);
 void nvkm_fifo_cevent(struct nvkm_fifo *);
 void nvkm_fifo_kevent(struct nvkm_fifo *, int chid);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c
index f2e91f9c06e12ec62b9c94c9818c7bd2e02e6cfa..c60709106d618c398135029fef23f5ce039031bb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c
@@ -464,7 +464,8 @@ tu102_fifo_ = {
 };
 
 int
-tu102_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
+tu102_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_fifo **pfifo)
 {
        struct gk104_fifo *fifo;
 
@@ -474,5 +475,5 @@ tu102_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
        INIT_WORK(&fifo->recover.work, tu102_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&tu102_fifo_, device, index, 4096, &fifo->base);
+       return nvkm_fifo_ctor(&tu102_fifo_, device, type, inst, 4096, &fifo->base);
 }