Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality"

The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
used the wrong compatible string for the watchdog timer, so the Allwinner
DM reset driver was not working properly. We worked around this by
disabling the SYSRESET driver, so the hardcoded SPL reset driver took
over.
Now the issue was fixed in the DTs in mainline Linux, and we synced the
fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
proper reset infrastructure.

This reverts commit 1b79d4134a7b18122752e709142b240a04c5a231.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
index 67b7b85c4914d4b63049011f10e9ad86d3c332da..9fd1dcc9958fa5bf18ad2343d7e352f917e5ad3d 100644 (file)
--- a/configs/licheepi_nano_defconfig
+++ b/configs/licheepi_nano_defconfig
@@ -10,4 +10,3 @@ CONFIG_DRAM_CLK=156
 CONFIG_DRAM_ZQ=0
 # CONFIG_VIDEO_SUNXI is not set
 CONFIG_SPL_SPI_SUNXI=y
-# CONFIG_SYSRESET is not set