]> git.baikalelectronics.ru Git - kernel.git/commitdiff
KVM: SVM: Prepare for new bit definition in lbr_ctl
authorJanakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Thu, 6 Jul 2017 20:50:44 +0000 (15:50 -0500)
committerRadim Krčmář <rkrcmar@redhat.com>
Wed, 12 Jul 2017 20:38:28 +0000 (22:38 +0200)
The lbr_ctl variable in the vmcb control area is used to enable or
disable Last Branch Record (LBR) virtualization. However, this is to be
done using only bit 0 of the variable. To correct this and to prepare
for a new feature, change the current usage to work only on a particular
bit.

Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
arch/x86/include/asm/svm.h
arch/x86/kvm/svm.c

index 14824fc78f7e7160fa014979424f111a8a2e40f0..d1163f64d732684b20efe2f8092d6eefb838332e 100644 (file)
@@ -119,6 +119,8 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
 #define AVIC_ENABLE_SHIFT 31
 #define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)
 
+#define LBR_CTL_ENABLE_MASK BIT_ULL(0)
+
 #define SVM_INTERRUPT_SHADOW_MASK 1
 
 #define SVM_IOIO_STR_SHIFT 2
index 3da42d7c629e1063c23974d9794d22f6e6521a37..6e72127c0d0ecaceb63905074b3c2c3f90ddfb41 100644 (file)
@@ -947,7 +947,7 @@ static void svm_enable_lbrv(struct vcpu_svm *svm)
 {
        u32 *msrpm = svm->msrpm;
 
-       svm->vmcb->control.lbr_ctl = 1;
+       svm->vmcb->control.lbr_ctl |= LBR_CTL_ENABLE_MASK;
        set_msr_interception(msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1);
        set_msr_interception(msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
        set_msr_interception(msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
@@ -958,7 +958,7 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)
 {
        u32 *msrpm = svm->msrpm;
 
-       svm->vmcb->control.lbr_ctl = 0;
+       svm->vmcb->control.lbr_ctl &= ~LBR_CTL_ENABLE_MASK;
        set_msr_interception(msrpm, MSR_IA32_LASTBRANCHFROMIP, 0, 0);
        set_msr_interception(msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0);
        set_msr_interception(msrpm, MSR_IA32_LASTINTFROMIP, 0, 0);