drm/i915/params: switch to device specific parameters

Start using device specific parameters instead of module parameters for
most things. The module parameters become the immutable initial values
for i915 parameters. The device specific parameters in i915->params
start life as a copy of i915_modparams. Any later changes are only
reflected in the debugfs.

The stragglers are:

* i915.force_probe and i915.modeset. Needed before dev_priv is
  available. This is fine because the parameters are read-only and never
  modified.

* i915.verbose_state_checks. Passing dev_priv to I915_STATE_WARN and
  I915_STATE_WARN_ON would result in massive and ugly churn. This is
  handled by not exposing the parameter via debugfs, and leaving the
  parameter writable in sysfs. This may be fixed up in follow-up work.

* i915.inject_probe_failure. Only makes sense in terms of the module,
  not the device. This is handled by not exposing the parameter via
  debugfs.

v2: Fix uc i915 lookup code (Michał Winiarski)

Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20200618150402.14022-1-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c974c716f8593eb779865f29dd5016826117eab8..6593e2c38043e048f4cf3e9eee42f6ec59f6b11e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -479,7 +479,7 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
        struct drm_display_mode *panel_fixed_mode;
        int index;
 
-       index = i915_modparams.vbt_sdvo_panel_type;
+       index = dev_priv->params.vbt_sdvo_panel_type;
        if (index == -2) {
                drm_dbg_kms(&dev_priv->drm,
                            "Ignore SDVO panel mode from BIOS VBT tables.\n");
@@ -829,9 +829,9 @@ parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
                u8 vswing;
 
                /* Don't read from VBT if module parameter has valid value*/
-               if (i915_modparams.edp_vswing) {
+               if (dev_priv->params.edp_vswing) {
                        dev_priv->vbt.edp.low_vswing =
-                               i915_modparams.edp_vswing == 1;
+                               dev_priv->params.edp_vswing == 1;
                } else {
                        vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
                        dev_priv->vbt.edp.low_vswing = vswing == 0;

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 2f5b9a4baafdb9a5aac5c7724597488afd6eeefa..5b4510ce569352ee878bcbb121dc4cd362d0e357 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -833,7 +833,7 @@ intel_crt_detect(struct drm_connector *connector,
                    connector->base.id, connector->name,
                    force);
 
-       if (i915_modparams.load_detect_test) {
+       if (dev_priv->params.load_detect_test) {
                wakeref = intel_display_power_get(dev_priv,
                                                  intel_encoder->power_domain);
                goto load_detect;
@@ -889,7 +889,7 @@ load_detect:
                else if (INTEL_GEN(dev_priv) < 4)
                        status = intel_crt_load_detect(crt,
                                to_intel_crtc(connector->state->crtc)->pipe);
-               else if (i915_modparams.load_detect_test)
+               else if (dev_priv->params.load_detect_test)
                        status = connector_status_disconnected;
                else
                        status = connector_status_unknown;

diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
index 9843c9af6c132f02abadcbd6fdf240fae16a2222..f22a7645c249d710ac04ea0d0ecb25b6936a4bf4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_csr.c
+++ b/drivers/gpu/drm/i915/display/intel_csr.c
@@ -723,15 +723,15 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
                csr->max_fw_size = BXT_CSR_MAX_FW_SIZE;
        }
 
-       if (i915_modparams.dmc_firmware_path) {
-               if (strlen(i915_modparams.dmc_firmware_path) == 0) {
+       if (dev_priv->params.dmc_firmware_path) {
+               if (strlen(dev_priv->params.dmc_firmware_path) == 0) {
                        csr->fw_path = NULL;
                        drm_info(&dev_priv->drm,
                                 "Disabling CSR firmware and runtime PM\n");
                        return;
                }
 
-               csr->fw_path = i915_modparams.dmc_firmware_path;
+               csr->fw_path = dev_priv->params.dmc_firmware_path;
                /* Bypass version check for firmware override. */
                csr->required_version = 0;
        }

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 34d1b7f1b1407c34c17dee3593dcb8ddde139a39..77681356505b20415d7978f2bb04423b7b8ad8bf 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4886,7 +4886,7 @@ void intel_prepare_reset(struct drm_i915_private *dev_priv)
        int ret;
 
        /* reset doesn't touch the display */
-       if (!i915_modparams.force_reset_modeset_test &&
+       if (!dev_priv->params.force_reset_modeset_test &&
            !gpu_reset_clobbers_display(dev_priv))
                return;
 
@@ -7882,7 +7882,7 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
        if (!hsw_crtc_supports_ips(crtc))
                return false;
 
-       if (!i915_modparams.enable_ips)
+       if (!dev_priv->params.enable_ips)
                return false;
 
        if (crtc_state->pipe_bpp > 24)
@@ -8153,8 +8153,8 @@ static void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv)
 
 static bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
 {
-       if (i915_modparams.panel_use_ssc >= 0)
-               return i915_modparams.panel_use_ssc != 0;
+       if (dev_priv->params.panel_use_ssc >= 0)
+               return dev_priv->params.panel_use_ssc != 0;
        return dev_priv->vbt.lvds_use_ssc
                && !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
 }
@@ -13585,8 +13585,8 @@ pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
 
 static bool fastboot_enabled(struct drm_i915_private *dev_priv)
 {
-       if (i915_modparams.fastboot != -1)
-               return i915_modparams.fastboot;
+       if (dev_priv->params.fastboot != -1)
+               return dev_priv->params.fastboot;
 
        /* Enable fastboot by default on Skylake and newer */
        if (INTEL_GEN(dev_priv) >= 9)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 852f64946b96bf6ac6be1346274c11c0d6982b13..cfe2517e0088b0b1fc2a0fd457ba2c7f7012dd8b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -125,7 +125,7 @@ static int i915_ips_status(struct seq_file *m, void *unused)
        wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
 
        seq_printf(m, "Enabled by kernel parameter: %s\n",
-                  yesno(i915_modparams.enable_ips));
+                  yesno(dev_priv->params.enable_ips));
 
        if (INTEL_GEN(dev_priv) >= 8) {
                seq_puts(m, "Currently: unknown\n");

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 24a2aa1fdc9c17fde374e43a9787222f84cac2f1..834162bc5a3f424c8b0ca0f66fa0a0d7e1174fa4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4513,7 +4513,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
                mask = 0;
        }
 
-       if (!i915_modparams.disable_power_well)
+       if (!dev_priv->params.disable_power_well)
                max_dc = 0;
 
        if (enable_dc >= 0 && enable_dc <= max_dc) {
@@ -4602,11 +4602,11 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
        int err;
 
-       i915_modparams.disable_power_well =
+       dev_priv->params.disable_power_well =
                sanitize_disable_power_well_option(dev_priv,
-                                                  i915_modparams.disable_power_well);
+                                                  dev_priv->params.disable_power_well);
        dev_priv->csr.allowed_dc_mask =
-               get_allowed_dc_mask(dev_priv, i915_modparams.enable_dc);
+               get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc);
 
        dev_priv->csr.target_dc_state =
                sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
@@ -5568,7 +5568,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
                intel_display_power_get(i915, POWER_DOMAIN_INIT);
 
        /* Disable power support if the user asked so. */
-       if (!i915_modparams.disable_power_well)
+       if (!i915->params.disable_power_well)
                intel_display_power_get(i915, POWER_DOMAIN_INIT);
        intel_power_domains_sync_hw(i915);
 
@@ -5592,7 +5592,7 @@ void intel_power_domains_driver_remove(struct drm_i915_private *i915)
                fetch_and_zero(&i915->power_domains.wakeref);
 
        /* Remove the refcount we took to keep power well support disabled. */
-       if (!i915_modparams.disable_power_well)
+       if (!i915->params.disable_power_well)
                intel_display_power_put_unchecked(i915, POWER_DOMAIN_INIT);
 
        intel_display_power_flush_work_sync(i915);
@@ -5681,7 +5681,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915,
         * Even if power well support was disabled we still want to disable
         * power wells if power domains must be deinitialized for suspend.
         */
-       if (!i915_modparams.disable_power_well)
+       if (!i915->params.disable_power_well)
                intel_display_power_put_unchecked(i915, POWER_DOMAIN_INIT);
 
        intel_display_power_flush_work(i915);

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 709ab7407a968a2840c35562d14297fd64847e15..bbba97c956a297a8204d58a7e3933988410424a2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4707,7 +4707,9 @@ intel_dp_sink_can_mst(struct intel_dp *intel_dp)
 static bool
 intel_dp_can_mst(struct intel_dp *intel_dp)
 {
-       return i915_modparams.enable_dp_mst &&
+       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+       return i915->params.enable_dp_mst &&
                intel_dp->can_mst &&
                intel_dp_sink_can_mst(intel_dp);
 }
@@ -4724,13 +4726,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
                    "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n",
                    encoder->base.base.id, encoder->base.name,
                    yesno(intel_dp->can_mst), yesno(sink_can_mst),
-                   yesno(i915_modparams.enable_dp_mst));
+                   yesno(i915->params.enable_dp_mst));
 
        if (!intel_dp->can_mst)
                return;
 
        intel_dp->is_mst = sink_can_mst &&
-               i915_modparams.enable_dp_mst;
+               i915->params.enable_dp_mst;
 
        drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
                                        intel_dp->is_mst);

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 0722540d64ad1a2c0400fbb4c825fe9d56530cc7..acbd7eb66cbe3c18dc11ab79346697504d9f513b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -348,7 +348,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
        struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
        struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
-       if (i915_modparams.enable_dpcd_backlight == 0 ||
+       if (i915->params.enable_dpcd_backlight == 0 ||
            !intel_dp_aux_display_control_capable(intel_connector))
                return -ENODEV;
 
@@ -358,7 +358,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
         */
        if (i915->vbt.backlight.type !=
            INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
-           i915_modparams.enable_dpcd_backlight != 1 &&
+           i915->params.enable_dpcd_backlight != 1 &&
            !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
                              DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
                drm_info(&i915->drm,

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1c26673acb2dd8bd603c427a1eddae38b86761e6..30649e17cfb748b9a78163af2f17f89a11585d21 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -740,7 +740,7 @@ static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv)
                return false;
        }
 
-       if (!i915_modparams.enable_fbc) {
+       if (!dev_priv->params.enable_fbc) {
                fbc->no_fbc_reason = "disabled per module param or by default";
                return false;
        }
@@ -1017,7 +1017,7 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
 
        fbc->flip_pending = false;
 
-       if (!i915_modparams.enable_fbc) {
+       if (!dev_priv->params.enable_fbc) {
                intel_fbc_deactivate(dev_priv, "disabled at runtime per module param");
                __intel_fbc_disable(dev_priv);
 
@@ -1370,8 +1370,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
  */
 static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv)
 {
-       if (i915_modparams.enable_fbc >= 0)
-               return !!i915_modparams.enable_fbc;
+       if (dev_priv->params.enable_fbc >= 0)
+               return !!dev_priv->params.enable_fbc;
 
        if (!HAS_FBC(dev_priv))
                return 0;
@@ -1415,9 +1415,9 @@ void intel_fbc_init(struct drm_i915_private *dev_priv)
        if (need_fbc_vtd_wa(dev_priv))
                mkwrite_device_info(dev_priv)->display.has_fbc = false;
 
-       i915_modparams.enable_fbc = intel_sanitize_fbc_option(dev_priv);
+       dev_priv->params.enable_fbc = intel_sanitize_fbc_option(dev_priv);
        drm_dbg_kms(&dev_priv->drm, "Sanitized enable_fbc value: %d\n",
-                   i915_modparams.enable_fbc);
+                   dev_priv->params.enable_fbc);
 
        if (!HAS_FBC(dev_priv)) {
                fbc->no_fbc_reason = "unsupported by this chipset";

diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 872f2a48933953e325704be42db4f6433c17962f..1888611244db7c000c94bbc36101361a82024f22 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -784,8 +784,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
        struct drm_i915_private *dev_priv = to_i915(dev);
 
        /* use the module option value if specified */
-       if (i915_modparams.lvds_channel_mode > 0)
-               return i915_modparams.lvds_channel_mode == 2;
+       if (dev_priv->params.lvds_channel_mode > 0)
+               return dev_priv->params.lvds_channel_mode == 2;
 
        /* single channel LVDS is limited to 112 MHz */
        if (lvds_encoder->attached_connector->panel.fixed_mode->clock > 112999)

diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index cc6b00959586455688c83eeabfe341c36fbc5f5f..de995362f42832206be9f512aa6f0effc68cda6e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -801,7 +801,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
 {
        struct intel_opregion *opregion = &dev_priv->opregion;
        const struct firmware *fw = NULL;
-       const char *name = i915_modparams.vbt_firmware;
+       const char *name = dev_priv->params.vbt_firmware;
        int ret;
 
        if (!name || !*name)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 3c5056dbf60793fda6b64132e1b86eef88901391..aaed9eb3b56cec206ef05cead5cdd2eb58eb718d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -521,10 +521,10 @@ static u32 intel_panel_compute_brightness(struct intel_connector *connector,
 
        drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
 
-       if (i915_modparams.invert_brightness < 0)
+       if (dev_priv->params.invert_brightness < 0)
                return val;
 
-       if (i915_modparams.invert_brightness > 0 ||
+       if (dev_priv->params.invert_brightness > 0 ||
            dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
                return panel->backlight.max - val + panel->backlight.min;
        }

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ab380e6dc674dad8e41e16575a2c7a66212a52e7..86bf7a76f93d2b3e356ce73b61165c6ee19c62c8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -83,7 +83,7 @@ static bool psr_global_enabled(struct drm_i915_private *i915)
 {
        switch (i915->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
        case I915_PSR_DEBUG_DEFAULT:
-               return i915_modparams.enable_psr;
+               return i915->params.enable_psr;
        case I915_PSR_DEBUG_DISABLE:
                return false;
        default:
@@ -426,7 +426,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
        if (INTEL_GEN(dev_priv) >= 11)
                val |= EDP_PSR_TP4_TIME_0US;
 
-       if (i915_modparams.psr_safest_params) {
+       if (dev_priv->params.psr_safest_params) {
                val |= EDP_PSR_TP1_TIME_2500us;
                val |= EDP_PSR_TP2_TP3_TIME_2500us;
                goto check_tp3_sel;
@@ -507,7 +507,7 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
        u32 val = 0;
 
-       if (i915_modparams.psr_safest_params)
+       if (dev_priv->params.psr_safest_params)
                return EDP_PSR2_TP2_TIME_2500us;
 
        if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
@@ -1500,9 +1500,9 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
                 */
                dev_priv->hsw_psr_mmio_adjust = _SRD_CTL_EDP - _HSW_EDP_PSR_BASE;
 
-       if (i915_modparams.enable_psr == -1)
+       if (dev_priv->params.enable_psr == -1)
                if (INTEL_GEN(dev_priv) < 9 || !dev_priv->vbt.psr.enable)
-                       i915_modparams.enable_psr = 0;
+                       dev_priv->params.enable_psr = 0;
 
        /* Set link_standby x link_off defaults */
        if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index f5d59d18cd5ba377b4b1961c712fcdd4f10751ea..4d88faeb4d4ca3e272533cf9f15d50229ba01741 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -650,7 +650,7 @@ static void context_close(struct i915_gem_context *ctx)
         * context close.
         */
        if (!i915_gem_context_is_persistent(ctx) ||
-           !i915_modparams.enable_hangcheck)
+           !ctx->i915->params.enable_hangcheck)
                kill_context(ctx);
 
        i915_gem_context_put(ctx);
@@ -667,7 +667,7 @@ static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
                 * reset] are allowed to survive past termination. We require
                 * hangcheck to ensure that the persistent requests are healthy.
                 */
-               if (!i915_modparams.enable_hangcheck)
+               if (!ctx->i915->params.enable_hangcheck)
                        return -EINVAL;
 
                i915_gem_context_set_persistence(ctx);

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index cd20fb549b38447f141fccc3bd61a08de5a4fe63..8db7e93abde5f7b145139cf04d10ff5130cd0a41 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
@@ -4,6 +4,7 @@
  * Copyright © 2019 Intel Corporation
  */
 
+#include "i915_drv.h"
 #include "i915_request.h"
 
 #include "intel_context.h"
@@ -133,7 +134,7 @@ static void heartbeat(struct work_struct *wrk)
                goto unlock;
 
        idle_pulse(engine, rq);
-       if (i915_modparams.enable_hangcheck)
+       if (engine->i915->params.enable_hangcheck)
                engine->heartbeat.systole = i915_request_get(rq);
 
        __i915_request_commit(rq);

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 39070b514e65a4a602cb891a4b6a691827b5e4e0..0156f1f5c736fd441a33d8f621065f5717fc4947 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -638,7 +638,7 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
 
 bool intel_has_gpu_reset(const struct intel_gt *gt)
 {
-       if (!i915_modparams.reset)
+       if (!gt->i915->params.reset)
                return NULL;
 
        return intel_get_gpu_reset(gt);
@@ -646,7 +646,7 @@ bool intel_has_gpu_reset(const struct intel_gt *gt)
 
 bool intel_has_reset_engine(const struct intel_gt *gt)
 {
-       if (i915_modparams.reset < 2)
+       if (gt->i915->params.reset < 2)
                return false;
 
        return INTEL_INFO(gt->i915)->has_reset_engine;
@@ -1038,7 +1038,7 @@ void intel_gt_reset(struct intel_gt *gt,
        awake = reset_prepare(gt);
 
        if (!intel_has_gpu_reset(gt)) {
-               if (i915_modparams.reset)
+               if (gt->i915->params.reset)
                        drm_err(&gt->i915->drm, "GPU reset not supported\n");
                else
                        drm_dbg(&gt->i915->drm, "GPU reset disabled\n");

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index f3034c613bc0e21939cb2ee2d836b88d8ea72264..73243ba59c7d2309b3f1dcb5133b4916eba4ddca 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -365,12 +365,12 @@ int intel_heartbeat_live_selftests(struct drm_i915_private *i915)
        if (intel_gt_is_wedged(&i915->gt))
                return 0;
 
-       saved_hangcheck = i915_modparams.enable_hangcheck;
-       i915_modparams.enable_hangcheck = INT_MAX;
+       saved_hangcheck = i915->params.enable_hangcheck;
+       i915->params.enable_hangcheck = INT_MAX;
 
        err = intel_gt_live_subtests(tests, &i915->gt);
 
-       i915_modparams.enable_hangcheck = saved_hangcheck;
+       i915->params.enable_hangcheck = saved_hangcheck;
        return err;
 }
 

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index fb10f3597ea59f34b6c6fb72bf58deb003b66b69..9bbe8a795cb8bb18adb6d01df1440b0240842965 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -424,25 +424,28 @@ static void guc_log_capture_logs(struct intel_guc_log *log)
 
 static u32 __get_default_log_level(struct intel_guc_log *log)
 {
+       struct intel_guc *guc = log_to_guc(log);
+       struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
+
        /* A negative value means "use platform/config default" */
-       if (i915_modparams.guc_log_level < 0) {
+       if (i915->params.guc_log_level < 0) {
                return (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
                        IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) ?
                        GUC_LOG_LEVEL_MAX : GUC_LOG_LEVEL_NON_VERBOSE;
        }
 
-       if (i915_modparams.guc_log_level > GUC_LOG_LEVEL_MAX) {
+       if (i915->params.guc_log_level > GUC_LOG_LEVEL_MAX) {
                DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
-                        "guc_log_level", i915_modparams.guc_log_level,
+                        "guc_log_level", i915->params.guc_log_level,
                         "verbosity too high");
                return (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
                        IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) ?
                        GUC_LOG_LEVEL_MAX : GUC_LOG_LEVEL_DISABLED;
        }
 
-       GEM_BUG_ON(i915_modparams.guc_log_level < GUC_LOG_LEVEL_DISABLED);
-       GEM_BUG_ON(i915_modparams.guc_log_level > GUC_LOG_LEVEL_MAX);
-       return i915_modparams.guc_log_level;
+       GEM_BUG_ON(i915->params.guc_log_level < GUC_LOG_LEVEL_DISABLED);
+       GEM_BUG_ON(i915->params.guc_log_level > GUC_LOG_LEVEL_MAX);
+       return i915->params.guc_log_level;
 }
 
 int intel_guc_log_create(struct intel_guc_log *log)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 94eb63f309cefb954fc3bfc103d88f618201fda8..fdfeb4b9b0f54cdc18e6772fea40a467d7fc6eaa 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -660,10 +660,12 @@ void intel_guc_submission_disable(struct intel_guc *guc)
 
 static bool __guc_submission_selected(struct intel_guc *guc)
 {
+       struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
+
        if (!intel_guc_submission_is_supported(guc))
                return false;
 
-       return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION;
+       return i915->params.enable_guc & ENABLE_GUC_SUBMISSION;
 }
 
 void intel_guc_submission_init_early(struct intel_guc *guc)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index f518fe05c6f9a79396ba52aa217db45a2cde1b6e..1c2d6358826c872f8921d1c1427f71136845716f 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -47,15 +47,15 @@ static void __confirm_options(struct intel_uc *uc)
 
        drm_dbg(&i915->drm,
                "enable_guc=%d (guc:%s submission:%s huc:%s)\n",
-               i915_modparams.enable_guc,
+               i915->params.enable_guc,
                yesno(intel_uc_wants_guc(uc)),
                yesno(intel_uc_wants_guc_submission(uc)),
                yesno(intel_uc_wants_huc(uc)));
 
-       if (i915_modparams.enable_guc == -1)
+       if (i915->params.enable_guc == -1)
                return;
 
-       if (i915_modparams.enable_guc == 0) {
+       if (i915->params.enable_guc == 0) {
                GEM_BUG_ON(intel_uc_wants_guc(uc));
                GEM_BUG_ON(intel_uc_wants_guc_submission(uc));
                GEM_BUG_ON(intel_uc_wants_huc(uc));
@@ -65,25 +65,25 @@ static void __confirm_options(struct intel_uc *uc)
        if (!intel_uc_supports_guc(uc))
                drm_info(&i915->drm,
                         "Incompatible option enable_guc=%d - %s\n",
-                        i915_modparams.enable_guc, "GuC is not supported!");
+                        i915->params.enable_guc, "GuC is not supported!");
 
-       if (i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC &&
+       if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC &&
            !intel_uc_supports_huc(uc))
                drm_info(&i915->drm,
                         "Incompatible option enable_guc=%d - %s\n",
-                        i915_modparams.enable_guc, "HuC is not supported!");
+                        i915->params.enable_guc, "HuC is not supported!");
 
-       if (i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION &&
+       if (i915->params.enable_guc & ENABLE_GUC_SUBMISSION &&
            !intel_uc_supports_guc_submission(uc))
                drm_info(&i915->drm,
                         "Incompatible option enable_guc=%d - %s\n",
-                        i915_modparams.enable_guc, "GuC submission is N/A");
+                        i915->params.enable_guc, "GuC submission is N/A");
 
-       if (i915_modparams.enable_guc & ~(ENABLE_GUC_SUBMISSION |
+       if (i915->params.enable_guc & ~(ENABLE_GUC_SUBMISSION |
                                          ENABLE_GUC_LOAD_HUC))
                drm_info(&i915->drm,
                         "Incompatible option enable_guc=%d - %s\n",
-                        i915_modparams.enable_guc, "undocumented flag");
+                        i915->params.enable_guc, "undocumented flag");
 }
 
 void intel_uc_init_early(struct intel_uc *uc)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index e75be3999358549a4ec8216ab4431b9bbb45e83d..59b27aba15c6f0fd54efb11be05777d814bb18bf 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -115,11 +115,13 @@ struct __packed uc_fw_platform_requirement {
 },
 
 static void
-__uc_fw_auto_select(struct intel_uc_fw *uc_fw, enum intel_platform p, u8 rev)
+__uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
 {
        static const struct uc_fw_platform_requirement fw_blobs[] = {
                INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB)
        };
+       enum intel_platform p = INTEL_INFO(i915)->platform;
+       u8 rev = INTEL_REVID(i915);
        int i;
 
        for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) {
@@ -154,35 +156,35 @@ __uc_fw_auto_select(struct intel_uc_fw *uc_fw, enum intel_platform p, u8 rev)
        }
 
        /* We don't want to enable GuC/HuC on pre-Gen11 by default */
-       if (i915_modparams.enable_guc == -1 && p < INTEL_ICELAKE)
+       if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
                uc_fw->path = NULL;
 }
 
-static const char *__override_guc_firmware_path(void)
+static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
 {
-       if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION |
-                                        ENABLE_GUC_LOAD_HUC))
-               return i915_modparams.guc_firmware_path;
+       if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
+                                      ENABLE_GUC_LOAD_HUC))
+               return i915->params.guc_firmware_path;
        return "";
 }
 
-static const char *__override_huc_firmware_path(void)
+static const char *__override_huc_firmware_path(struct drm_i915_private *i915)
 {
-       if (i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC)
-               return i915_modparams.huc_firmware_path;
+       if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC)
+               return i915->params.huc_firmware_path;
        return "";
 }
 
-static void __uc_fw_user_override(struct intel_uc_fw *uc_fw)
+static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
 {
        const char *path = NULL;
 
        switch (uc_fw->type) {
        case INTEL_UC_FW_TYPE_GUC:
-               path = __override_guc_firmware_path();
+               path = __override_guc_firmware_path(i915);
                break;
        case INTEL_UC_FW_TYPE_HUC:
-               path = __override_huc_firmware_path();
+               path = __override_huc_firmware_path(i915);
                break;
        }
 
@@ -216,10 +218,8 @@ void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
        uc_fw->type = type;
 
        if (HAS_GT_UC(i915)) {
-               __uc_fw_auto_select(uc_fw,
-                                   INTEL_INFO(i915)->platform,
-                                   INTEL_REVID(i915));
-               __uc_fw_user_override(uc_fw);
+               __uc_fw_auto_select(i915, uc_fw);
+               __uc_fw_user_override(i915, uc_fw);
        }
 
        intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ?

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 4481feb34bc57066f9ca70c7bb666e73c20b4089..242f59910c1901454d9430c29134f407edbcc80e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -64,7 +64,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
        intel_driver_caps_print(&i915->caps, &p);
 
        kernel_param_lock(THIS_MODULE);
-       i915_params_dump(&i915_modparams, &p);
+       i915_params_dump(&i915->params, &p);
        kernel_param_unlock(THIS_MODULE);
 
        return 0;

diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c
index 62b2c5f0495d79bf5f06d1a080bf58c01d6c13ec..4e2b077692cb5ace70cd5ea64fabd17df9738ef1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs_params.c
+++ b/drivers/gpu/drm/i915/i915_debugfs_params.c
@@ -138,9 +138,6 @@ static ssize_t i915_param_charp_write(struct file *file,
        char **s = m->private;
        char *new, *old;
 
-       /* FIXME: remove locking after params aren't the module params */
-       kernel_param_lock(THIS_MODULE);
-
        old = *s;
        new = strndup_user(ubuf, PAGE_SIZE);
        if (IS_ERR(new)) {
@@ -152,8 +149,6 @@ static ssize_t i915_param_charp_write(struct file *file,
 
        kfree(old);
 out:
-       kernel_param_unlock(THIS_MODULE);
-
        return len;
 }
 
@@ -229,7 +224,7 @@ _i915_param_create_file(struct dentry *parent, const char *name,
 struct dentry *i915_debugfs_params(struct drm_i915_private *i915)
 {
        struct drm_minor *minor = i915->drm.primary;
-       struct i915_params *params = &i915_modparams;
+       struct i915_params *params = &i915->params;
        struct dentry *dir;
 
        dir = debugfs_create_dir("i915_params", minor->debugfs_root);

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c08b165a9cb42488ba4aec98d4bff7b06b1656bf..da991d1967a2a96d545b13bb17e0cd97d21fd969 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -500,6 +500,8 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv)
 
        cpu_latency_qos_remove_request(&dev_priv->sb_qos);
        mutex_destroy(&dev_priv->sb_lock);
+
+       i915_params_free(&dev_priv->params);
 }
 
 /**
@@ -920,6 +922,9 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
        i915->drm.pdev = pdev;
        pci_set_drvdata(pdev, i915);
 
+       /* Device parameters start as a copy of module parameters. */
+       i915_params_copy(&i915->params, &i915_modparams);
+
        /* Setup the write-once "constant" device info */
        device_info = mkwrite_device_info(i915);
        memcpy(device_info, match_info, sizeof(*device_info));
@@ -964,7 +969,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                return PTR_ERR(i915);
 
        /* Disable nuclear pageflip by default on pre-ILK */
-       if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
+       if (!i915->params.nuclear_pageflip && match_info->gen < 5)
                i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
        /*
@@ -974,7 +979,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
        if (IS_ENABLED(CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM)) {
                if (INTEL_GEN(i915) >= 9 && i915_selftest.live < 0 &&
-                   i915_modparams.fake_lmem_start) {
+                   i915->params.fake_lmem_start) {
                        mkwrite_device_info(i915)->memory_regions =
                                REGION_SMEM | REGION_LMEM | REGION_STOLEN;
                        mkwrite_device_info(i915)->is_dgfx = true;

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7a9ea43bab664813d41e6a28bfa58ffea6313892..2697960f15a9d3d2335d76e1fcbefcfa7561cc71 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -827,6 +827,9 @@ struct i915_selftest_stash {
 struct drm_i915_private {
        struct drm_device drm;
 
+       /* i915 device parameters */
+       struct i915_params params;
+
        const struct intel_device_info __info; /* Use INTEL_INFO() to access. */
        struct intel_runtime_info __runtime; /* Use RUNTIME_INFO() to access. */
        struct intel_driver_caps caps;
@@ -1688,7 +1691,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 /* Only valid when HAS_DISPLAY() is true */
 #define INTEL_DISPLAY_ENABLED(dev_priv) \
-               (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !i915_modparams.disable_display)
+       (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
 
 static inline bool intel_vtd_active(void)
 {

diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index d042644b9cd28dda0087c9c5ae9e9c258f256166..40390b2352b17004b6f223c471feb25724ebf8bb 100644 (file)
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -80,7 +80,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
                        return -ENODEV;
                break;
        case I915_PARAM_HAS_GPU_RESET:
-               value = i915_modparams.enable_hangcheck &&
+               value = i915->params.enable_hangcheck &&
                        intel_has_gpu_reset(&i915->gt);
                if (value && intel_has_reset_engine(&i915->gt))
                        value = 2;

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index eec292d06f1159dfe83f96760c348a0db2466520..866166ada10e865fa152520d93a5f95cfca36b63 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1698,7 +1698,7 @@ static void capture_gen(struct i915_gpu_coredump *error)
        error->reset_count = i915_reset_count(&i915->gpu_error);
        error->suspend_count = i915->suspend_count;
 
-       i915_params_copy(&error->params, &i915_modparams);
+       i915_params_copy(&error->params, &i915->params);
        memcpy(&error->device_info,
               INTEL_INFO(i915),
               sizeof(error->device_info));
@@ -1713,7 +1713,7 @@ i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp)
 {
        struct i915_gpu_coredump *error;
 
-       if (!i915_modparams.error_capture)
+       if (!i915->params.error_capture)
                return NULL;
 
        error = kzalloc(sizeof(*error), gfp);

diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
index dd8981340d6e4714172c38d084b274738ad4dd5c..99fe8aef1c67f09d9a40beddf077418d4c9b2d5e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_gvt.c
+++ b/drivers/gpu/drm/i915/intel_gvt.c
@@ -66,7 +66,7 @@ static bool is_supported_device(struct drm_i915_private *dev_priv)
  */
 void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
 {
-       if (!i915_modparams.enable_gvt)
+       if (!dev_priv->params.enable_gvt)
                return;
 
        if (intel_vgpu_active(dev_priv)) {
@@ -82,7 +82,7 @@ void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
 
        return;
 bail:
-       i915_modparams.enable_gvt = 0;
+       dev_priv->params.enable_gvt = 0;
 }
 
 /**
@@ -102,7 +102,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv)
        if (i915_inject_probe_failure(dev_priv))
                return -ENODEV;
 
-       if (!i915_modparams.enable_gvt) {
+       if (!dev_priv->params.enable_gvt) {
                drm_dbg(&dev_priv->drm,
                        "GVT-g is disabled by kernel params\n");
                return 0;
@@ -123,7 +123,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv)
        return 0;
 
 bail:
-       i915_modparams.enable_gvt = 0;
+       dev_priv->params.enable_gvt = 0;
        return 0;
 }
 

diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c
index 14b59b899c9b375e008a360c389605eea949b861..40d8f1a95df61fdf286419ad97da8a446f593ace 100644 (file)
--- a/drivers/gpu/drm/i915/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/intel_region_lmem.c
@@ -76,7 +76,7 @@ region_lmem_init(struct intel_memory_region *mem)
 {
        int ret;
 
-       if (i915_modparams.fake_lmem_start) {
+       if (mem->i915->params.fake_lmem_start) {
                ret = init_fake_lmem_bar(mem);
                GEM_BUG_ON(ret);
        }
@@ -111,12 +111,12 @@ intel_setup_fake_lmem(struct drm_i915_private *i915)
        resource_size_t start;
 
        GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));
-       GEM_BUG_ON(!i915_modparams.fake_lmem_start);
+       GEM_BUG_ON(!i915->params.fake_lmem_start);
 
        /* Your mappable aperture belongs to me now! */
        mappable_end = pci_resource_len(pdev, 2);
        io_start = pci_resource_start(pdev, 2),
-       start = i915_modparams.fake_lmem_start;
+       start = i915->params.fake_lmem_start;
 
        mem = intel_memory_region_create(i915,
                                         start,

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 7d6b9ae7403cb1f0b96305e07038acb6e9d34e82..592364aed2da04b251eb72cc0ebf46228cadb156 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1185,7 +1185,7 @@ __unclaimed_reg_debug(struct intel_uncore *uncore,
                     read ? "read from" : "write to",
                     i915_mmio_reg_offset(reg)))
                /* Only report the first N failures */
-               i915_modparams.mmio_debug--;
+               uncore->i915->params.mmio_debug--;
 }
 
 static inline void
@@ -1194,7 +1194,7 @@ unclaimed_reg_debug(struct intel_uncore *uncore,
                    const bool read,
                    const bool before)
 {
-       if (likely(!i915_modparams.mmio_debug))
+       if (likely(!uncore->i915->params.mmio_debug))
                return;
 
        /* interrupts are disabled and re-enabled around uncore->lock usage */
@@ -2093,12 +2093,12 @@ intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore)
                goto out;
 
        if (unlikely(check_for_unclaimed_mmio(uncore))) {
-               if (!i915_modparams.mmio_debug) {
+               if (!uncore->i915->params.mmio_debug) {
                        drm_dbg(&uncore->i915->drm,
                                "Unclaimed register detected, "
                                "enabling oneshot unclaimed register reporting. "
                                "Please use i915.mmio_debug=N for more information.\n");
-                       i915_modparams.mmio_debug++;
+                       uncore->i915->params.mmio_debug++;
                }
                uncore->debug->unclaimed_mmio_check--;
                ret = true;