]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/dg2: Report INSTDONE_GEOM values in error state
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 5 Aug 2021 16:36:41 +0000 (09:36 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 11 Aug 2021 15:21:37 +0000 (08:21 -0700)
Xe_HPG adds some additional INSTDONE_GEOM debug registers; the Mesa team
has indicated that having these reported in the error state would be
useful for debugging GPU hangs.  These registers are replicated per-DSS
with gslice steering.

Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210805163647.801064-4-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_engine_cs.c
drivers/gpu/drm/i915/gt/intel_engine_types.h
drivers/gpu/drm/i915/i915_gpu_error.c
drivers/gpu/drm/i915/i915_reg.h

index 58ed67894b3db580762d6c7094d0593537432f9c..332efea696a55cc9ad60905cf79741ba682a1bb6 100644 (file)
@@ -1202,6 +1202,13 @@ void intel_engine_get_instdone(const struct intel_engine_cs *engine,
                                                          GEN7_ROW_INSTDONE);
                        }
                }
+
+               if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) {
+                       for_each_instdone_gslice_dss_xehp(i915, sseu, iter, slice, subslice)
+                               instdone->geom_svg[slice][subslice] =
+                                       read_subslice_reg(engine, slice, subslice,
+                                                         XEHPG_INSTDONE_GEOM_SVG);
+               }
        } else if (GRAPHICS_VER(i915) >= 7) {
                instdone->instdone =
                        intel_uncore_read(uncore, RING_INSTDONE(mmio_base));
index 0b4846b01626e51183166b28d374d3f0c7e8451c..bfbfe53c23dd844bf85aa522225cd66e0ab5e4b9 100644 (file)
@@ -69,6 +69,9 @@ struct intel_instdone {
        u32 slice_common_extra[2];
        u32 sampler[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
        u32 row[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
+
+       /* Added in XeHPG */
+       u32 geom_svg[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
 };
 
 /*
index 8230bc3ac8a99a3b8de39c5762495217a173bc9b..91d5da7b0a2b8bac7e7878d54099caf4c2873a9a 100644 (file)
@@ -431,6 +431,7 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
        const struct sseu_dev_info *sseu = &ee->engine->gt->info.sseu;
        int slice;
        int subslice;
+       int iter;
 
        err_printf(m, "  INSTDONE: 0x%08x\n",
                   ee->instdone.instdone);
@@ -445,8 +446,6 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
                return;
 
        if (GRAPHICS_VER_FULL(m->i915) >= IP_VER(12, 50)) {
-               int iter;
-
                for_each_instdone_gslice_dss_xehp(m->i915, sseu, iter, slice, subslice)
                        err_printf(m, "  SAMPLER_INSTDONE[%d][%d]: 0x%08x\n",
                                   slice, subslice,
@@ -471,6 +470,13 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
        if (GRAPHICS_VER(m->i915) < 12)
                return;
 
+       if (GRAPHICS_VER_FULL(m->i915) >= IP_VER(12, 55)) {
+               for_each_instdone_gslice_dss_xehp(m->i915, sseu, iter, slice, subslice)
+                       err_printf(m, "  GEOM_SVGUNIT_INSTDONE[%d][%d]: 0x%08x\n",
+                                  slice, subslice,
+                                  ee->instdone.geom_svg[slice][subslice]);
+       }
+
        err_printf(m, "  SC_INSTDONE_EXTRA: 0x%08x\n",
                   ee->instdone.slice_common_extra[0]);
        err_printf(m, "  SC_INSTDONE_EXTRA2: 0x%08x\n",
index 2113925084b0119dbf9fb67cf4f929dc22e2df81..9884c1156b95f0e303941fdfe7489a02ce46b7d7 100644 (file)
@@ -2695,6 +2695,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN12_SC_INSTDONE_EXTRA2       _MMIO(0x7108)
 #define GEN7_SAMPLER_INSTDONE  _MMIO(0xe160)
 #define GEN7_ROW_INSTDONE      _MMIO(0xe164)
+#define XEHPG_INSTDONE_GEOM_SVG                _MMIO(0x666c)
 #define MCFG_MCR_SELECTOR              _MMIO(0xfd0)
 #define SF_MCR_SELECTOR                        _MMIO(0xfd8)
 #define GEN8_MCR_SELECTOR              _MMIO(0xfdc)