ARM: imx27: Retrieve the SYSCTRL base address from devicetree

[ Upstream commit edd03979a0379c364d8f7806804ca14a512ae81e ]

Now that imx27 has been converted to a devicetree-only platform,
retrieve the SYSCTRL base address from devicetree.

To keep devicetree compatibilty the SYSCTRL base address will be
retrieved from the CCM base address plus an 0x800 offset.

This is not a problem as the imx27.dtsi describes the CCM register
range as 0x1000.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stable-dep-of: 87b30c4b0efb ("ARM: imx: add missing of_node_put()")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index a969aa71b60fc862027d5a1ff06d148179854108..bf70e13bbe9ee0ad41155a407006becf8f51d9f2 100644 (file)
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/io.h>
+#include <linux/of_address.h>
 #include <linux/module.h>
 
 #include "hardware.h"
@@ -17,16 +18,23 @@ static int mx27_cpu_rev = -1;
 static int mx27_cpu_partnumber;
 
 #define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
+#define SYSCTRL_OFFSET         0x800   /* Offset from CCM base address */
 
 static int mx27_read_cpu_rev(void)
 {
+       void __iomem *ccm_base;
+       struct device_node *np;
        u32 val;
+
+       np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
+       ccm_base = of_iomap(np, 0);
+       BUG_ON(!ccm_base);
        /*
         * now we have access to the IO registers. As we need
         * the silicon revision very early we read it here to
         * avoid any further hooks
        */
-       val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID));
+       val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
 
        mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);