]> git.baikalelectronics.ru Git - kernel.git/commitdiff
net: hns3: refactor function hclgevf_parse_capability()
authorGuangbin Huang <huangguangbin2@huawei.com>
Sat, 28 Aug 2021 06:55:17 +0000 (14:55 +0800)
committerDavid S. Miller <davem@davemloft.net>
Sat, 28 Aug 2021 10:20:05 +0000 (11:20 +0100)
The function hclgevf_parse_capability() will add more if statement in the
future, to improve code readability, maintainability and simplicity,
refactor this function by using a bit mapping array of IMP capabilities
and driver capabilities.

Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h

index d9ddb0a243d460fd6304e678a40a9eb004d80534..3c2600315f974122b0311585e1d7cf962a558a1d 100644 (file)
@@ -342,25 +342,26 @@ static void hclgevf_set_default_capability(struct hclgevf_dev *hdev)
        set_bit(HNAE3_DEV_SUPPORT_FEC_B, ae_dev->caps);
 }
 
+const struct hclgevf_caps_bit_map hclgevf_cmd_caps_bit_map0[] = {
+       {HCLGEVF_CAP_UDP_GSO_B, HNAE3_DEV_SUPPORT_UDP_GSO_B},
+       {HCLGEVF_CAP_INT_QL_B, HNAE3_DEV_SUPPORT_INT_QL_B},
+       {HCLGEVF_CAP_TQP_TXRX_INDEP_B, HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B},
+       {HCLGEVF_CAP_HW_TX_CSUM_B, HNAE3_DEV_SUPPORT_HW_TX_CSUM_B},
+       {HCLGEVF_CAP_UDP_TUNNEL_CSUM_B, HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B},
+       {HCLGEVF_CAP_RXD_ADV_LAYOUT_B, HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B},
+};
+
 static void hclgevf_parse_capability(struct hclgevf_dev *hdev,
                                     struct hclgevf_query_version_cmd *cmd)
 {
        struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
-       u32 caps;
+       u32 caps, i;
 
        caps = __le32_to_cpu(cmd->caps[0]);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_UDP_GSO_B))
-               set_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, ae_dev->caps);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_INT_QL_B))
-               set_bit(HNAE3_DEV_SUPPORT_INT_QL_B, ae_dev->caps);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_TQP_TXRX_INDEP_B))
-               set_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, ae_dev->caps);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_HW_TX_CSUM_B))
-               set_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, ae_dev->caps);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_UDP_TUNNEL_CSUM_B))
-               set_bit(HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, ae_dev->caps);
-       if (hnae3_get_bit(caps, HCLGEVF_CAP_RXD_ADV_LAYOUT_B))
-               set_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, ae_dev->caps);
+       for (i = 0; i < ARRAY_SIZE(hclgevf_cmd_caps_bit_map0); i++)
+               if (hnae3_get_bit(caps, hclgevf_cmd_caps_bit_map0[i].imp_bit))
+                       set_bit(hclgevf_cmd_caps_bit_map0[i].local_bit,
+                               ae_dev->caps);
 }
 
 static __le32 hclgevf_build_api_caps(void)
index f6d6502f038955ce8bdc15f6518676975f9e1670..39d0b589c720aa3361ddcc67f1efae0a61abb6b3 100644 (file)
@@ -296,6 +296,12 @@ struct hclgevf_dev_specs_1_cmd {
        u8 rsv1[18];
 };
 
+/* capabilities bits map between imp firmware and local driver */
+struct hclgevf_caps_bit_map {
+       u16 imp_bit;
+       u16 local_bit;
+};
+
 static inline void hclgevf_write_reg(void __iomem *base, u32 reg, u32 value)
 {
        writel(value, base + reg);