drm/amdgpu: Don't flush/invalidate HDP for APUs and A+A

Integrate two generic functions to determine if HDP
flush is needed for all Asics.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2d044f7edc9c3f2d8e727a1d72e80cbb95fe5cae..c0316eaba547c6577330ffefeea3c08161c7cc1d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1285,6 +1285,11 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
 int amdgpu_device_baco_enter(struct drm_device *dev);
 int amdgpu_device_baco_exit(struct drm_device *dev);
 
+void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
+               struct amdgpu_ring *ring);
+void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
+               struct amdgpu_ring *ring);
+
 /* atpx handler */
 #if defined(CONFIG_VGA_SWITCHEROO)
 void amdgpu_register_atpx_handler(void);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0585442b000ee219cabac280967a216e70fb2078..f6e10653d8280f98eb38f8e1c28a86a34d152458 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -313,9 +313,9 @@ void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
                if (write) {
                        memcpy_toio(addr, buf, count);
                        mb();
-                       amdgpu_asic_flush_hdp(adev, NULL);
+                       amdgpu_device_flush_hdp(adev, NULL);
                } else {
-                       amdgpu_asic_invalidate_hdp(adev, NULL);
+                       amdgpu_device_invalidate_hdp(adev, NULL);
                        mb();
                        memcpy_fromio(buf, addr, count);
                }
@@ -5475,4 +5475,31 @@ bool amdgpu_device_load_pci_state(struct pci_dev *pdev)
        return true;
 }
 
+void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
+               struct amdgpu_ring *ring)
+{
+#ifdef CONFIG_X86_64
+       if (adev->flags & AMD_IS_APU)
+               return;
+#endif
+       if (adev->gmc.xgmi.connected_to_cpu)
+               return;
+
+       if (ring && ring->funcs->emit_hdp_flush)
+               amdgpu_ring_emit_hdp_flush(ring);
+       else
+               amdgpu_asic_flush_hdp(adev, ring);
+}
 
+void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
+               struct amdgpu_ring *ring)
+{
+#ifdef CONFIG_X86_64
+       if (adev->flags & AMD_IS_APU)
+               return;
+#endif
+       if (adev->gmc.xgmi.connected_to_cpu)
+               return;
+
+       amdgpu_asic_invalidate_hdp(adev, ring);
+}

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 34243e122d115df92ae0b9cd15a8db7a1b90f29b..1313784605b0aff81c54e7cf56e7e8ef2112d780 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -250,7 +250,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
                }
        }
        mb();
-       amdgpu_asic_flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
        for (i = 0; i < adev->num_vmhubs; i++)
                amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0);
 
@@ -337,7 +337,7 @@ void amdgpu_gart_invalidate_tlb(struct amdgpu_device *adev)
        int i;
 
        mb();
-       amdgpu_asic_flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
        for (i = 0; i < adev->num_vmhubs; i++)
                amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0);
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 77baf9b48d670838072f2583cd0cf424aaaba0ac..ec65ab0ddf890e5dd9decfc87456f800a686a885 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -214,15 +214,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
        if (job && ring->funcs->init_cond_exec)
                patch_offset = amdgpu_ring_init_cond_exec(ring);
 
-#ifdef CONFIG_X86_64
-       if (!(adev->flags & AMD_IS_APU))
-#endif
-       {
-               if (ring->funcs->emit_hdp_flush)
-                       amdgpu_ring_emit_hdp_flush(ring);
-               else
-                       amdgpu_asic_flush_hdp(adev, ring);
-       }
+       amdgpu_device_flush_hdp(adev, ring);
 
        if (need_ctx_switch)
                status |= AMDGPU_HAVE_CTX_SWITCH;
@@ -259,10 +251,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
        if (job && ring->funcs->emit_frame_cntl)
                amdgpu_ring_emit_frame_cntl(ring, false, secure);
 
-#ifdef CONFIG_X86_64
-       if (!(adev->flags & AMD_IS_APU))
-#endif
-               amdgpu_asic_invalidate_hdp(adev, ring);
+       amdgpu_device_invalidate_hdp(adev, ring);
 
        if (ib->flags & AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE)
                fence_flags |= AMDGPU_FENCE_FLAG_TC_WB_ONLY;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 3ff76cbaec8d01710e3fb5f8d3f1fc53c039a283..33bda844aef93edcb1d5321c06bb58dcca52e101 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -282,7 +282,7 @@ psp_cmd_submit_buf(struct psp_context *psp,
                goto exit;
        }
 
-       amdgpu_asic_invalidate_hdp(psp->adev, NULL);
+       amdgpu_device_invalidate_hdp(psp->adev, NULL);
        while (*((unsigned int *)psp->fence_buf) != index) {
                if (--timeout == 0)
                        break;
@@ -295,7 +295,7 @@ psp_cmd_submit_buf(struct psp_context *psp,
                if (ras_intr)
                        break;
                usleep_range(10, 100);
-               amdgpu_asic_invalidate_hdp(psp->adev, NULL);
+               amdgpu_device_invalidate_hdp(psp->adev, NULL);
        }
 
        /* We allow TEE_ERROR_NOT_SUPPORTED for VMR command and PSP_ERR_UNKNOWN_COMMAND in SRIOV */
@@ -2696,7 +2696,7 @@ int psp_ring_cmd_submit(struct psp_context *psp,
        write_frame->fence_addr_hi = upper_32_bits(fence_mc_addr);
        write_frame->fence_addr_lo = lower_32_bits(fence_mc_addr);
        write_frame->fence_value = index;
-       amdgpu_asic_flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        /* Update the write Pointer in DWORDs */
        psp_write_ptr_reg = (psp_write_ptr_reg + rb_frame_size_dw) % ring_size_dw;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
index 03a44be50dd711283ce16419312decf62d96e6e0..e3fbf0f10add6ce3513ef8e3f0f42eb5f46abb70 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
@@ -110,7 +110,7 @@ static int amdgpu_vm_cpu_commit(struct amdgpu_vm_update_params *p,
 {
        /* Flush HDP */
        mb();
-       amdgpu_asic_flush_hdp(p->adev, NULL);
+       amdgpu_device_flush_hdp(p->adev, NULL);
        return 0;
 }