]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/gt: Add support of mocs propagation
authorAyaz A Siddiqui <ayaz.siddiqui@intel.com>
Fri, 3 Sep 2021 09:21:49 +0000 (14:51 +0530)
committerRamalingam C <ramalingam.c@intel.com>
Fri, 3 Sep 2021 14:47:20 +0000 (20:17 +0530)
Now there are lots of Command and registers that require mocs index
programming.
So propagating mocs_index from mocs to gt so that it can be
used directly without having platform-specific checks.

V2:
Changed 'i915_mocs_index_gt' to anonymous structure.

Cc: CQ Tang<cq.tang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210903092153.535736-2-ayaz.siddiqui@intel.com
drivers/gpu/drm/i915/gt/intel_gt.c
drivers/gpu/drm/i915/gt/intel_gt_types.h
drivers/gpu/drm/i915/gt/intel_mocs.c
drivers/gpu/drm/i915/gt/intel_mocs.h

index 62d40c9866427e7dfbd9838cdeb86956b32e5525..2aeaae036a6f85ce70c787eef21a2ff901db83ee 100644 (file)
@@ -682,6 +682,8 @@ int intel_gt_init(struct intel_gt *gt)
                goto err_pm;
        }
 
+       set_mocs_index(gt);
+
        err = intel_engines_init(gt);
        if (err)
                goto err_engines;
index a81e21bf1bd1a74b2225c2db1da7d163ac496700..6fdcde64c180012707fba2efcc2d2e29dc2fbb95 100644 (file)
@@ -192,6 +192,10 @@ struct intel_gt {
 
                unsigned long mslice_mask;
        } info;
+
+       struct {
+               u8 uc_index;
+       } mocs;
 };
 
 enum intel_gt_scratch_field {
index 582c4423b95d62ede4d2e70eb0676d37793d1e25..7ccac15d9a331b5190d93fc8c5c8c1ee1b30f0c3 100644 (file)
@@ -22,6 +22,7 @@ struct drm_i915_mocs_table {
        unsigned int size;
        unsigned int n_entries;
        const struct drm_i915_mocs_entry *table;
+       u8 uc_index;
 };
 
 /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */
@@ -340,14 +341,18 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915,
 {
        unsigned int flags;
 
+       memset(table, 0, sizeof(struct drm_i915_mocs_table));
+
        if (IS_DG1(i915)) {
                table->size = ARRAY_SIZE(dg1_mocs_table);
                table->table = dg1_mocs_table;
+               table->uc_index = 1;
                table->n_entries = GEN9_NUM_MOCS_ENTRIES;
        } else if (GRAPHICS_VER(i915) >= 12) {
                table->size  = ARRAY_SIZE(tgl_mocs_table);
                table->table = tgl_mocs_table;
                table->n_entries = GEN9_NUM_MOCS_ENTRIES;
+               table->uc_index = 3;
        } else if (GRAPHICS_VER(i915) == 11) {
                table->size  = ARRAY_SIZE(icl_mocs_table);
                table->table = icl_mocs_table;
@@ -504,6 +509,14 @@ static u32 global_mocs_offset(void)
        return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0));
 }
 
+void set_mocs_index(struct intel_gt *gt)
+{
+       struct drm_i915_mocs_table table;
+
+       get_mocs_settings(gt->i915, &table);
+       gt->mocs.uc_index = table.uc_index;
+}
+
 void intel_mocs_init(struct intel_gt *gt)
 {
        struct drm_i915_mocs_table table;
index d83274f5163bd430dcb20d6c38871b66321a6c82..8a09d64b115f7422d84daceae322d33eff40d387 100644 (file)
@@ -36,5 +36,6 @@ struct intel_gt;
 
 void intel_mocs_init(struct intel_gt *gt);
 void intel_mocs_init_engine(struct intel_engine_cs *engine);
+void set_mocs_index(struct intel_gt *gt);
 
 #endif