drm/i915/gt: Only ignore rc6 parking for PCU on byt/bsw

An oversight in that we use rc6->ctl_enable to disable rc6 on gen9 and
so it does not simply indicate indirect control via a PCU. Switch the
rc6->ctl_enable check for a platform-based check.

Fixes: 972745fd5770 ("drm/i915/gt: Disable manual rc6 for Braswell/Baytrail")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191212072737.884335-2-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 8ec2b7725141e57424bc89a450c43777859e9626..9e303c29d6e35bd4233c0a1fd69a640bd0579a03 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -576,6 +576,7 @@ void intel_rc6_enable(struct intel_rc6 *rc6)
        else if (INTEL_GEN(i915) >= 6)
                gen6_rc6_enable(rc6);
 
+       rc6->manual = rc6->ctl_enable & GEN6_RC_CTL_RC6_ENABLE;
        if (NEEDS_RC6_CTX_CORRUPTION_WA(i915))
                rc6->ctl_enable = 0;
 
@@ -612,7 +613,7 @@ void intel_rc6_park(struct intel_rc6 *rc6)
                return;
        }
 
-       if (!(rc6->ctl_enable & GEN6_RC_CTL_RC6_ENABLE))
+       if (!rc6->manual)
                return;
 
        /* Turn off the HW timers and go directly to rc6 */

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6_types.h b/drivers/gpu/drm/i915/gt/intel_rc6_types.h
index 60decae1abc956a271e1f7cf34461435c4c56306..bfbb623f7a4f3faf10d7b06986b9f2734dcd2b7e 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_rc6_types.h
@@ -24,6 +24,7 @@ struct intel_rc6 {
 
        bool supported : 1;
        bool enabled : 1;
+       bool manual : 1;
        bool wakeref : 1;
 };