drm/amdgpu: Enable ras support for mp0 v13_0_0 and v13_0_10

V1:
Enable ras support for CHIP_IP_DISCOVERY asic type.

V2:
1. Change commit comment.
2. Enable ras support for mp0 v13_0_0 and v13_0_10.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 75f1402101f4cd8ea614527bdbd24f8698722c21..4a8f73cc4cb5ca22dd5ceb3de7affe19b037b062 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2267,6 +2267,16 @@ static int amdgpu_ras_recovery_fini(struct amdgpu_device *adev)
 
 static bool amdgpu_ras_asic_supported(struct amdgpu_device *adev)
 {
+       if (adev->asic_type == CHIP_IP_DISCOVERY) {
+               switch (adev->ip_versions[MP0_HWIP][0]) {
+               case IP_VERSION(13, 0, 0):
+               case IP_VERSION(13, 0, 10):
+                       return true;
+               default:
+                       return false;
+               }
+       }
+
        return adev->asic_type == CHIP_VEGA10 ||
                adev->asic_type == CHIP_VEGA20 ||
                adev->asic_type == CHIP_ARCTURUS ||