Fixes the following reported crash:
[ 2.361127] BUG: spinlock bad magic on CPU#0, modprobe/456
[ 2.361583] lock: 0xffffa1287525b3b8, .magic:
00000000, .owner: <none>/-1, .owner_cpu: 0
[ 2.362250] CPU: 0 PID: 456 Comm: modprobe Not tainted 4.14.177 #5
[ 2.362751] Hardware name: HP Meep/Meep, BIOS Google_Meep.11297.75.0 06/17/2019
[ 2.363343] Call Trace:
[ 2.363552] dump_stack+0x97/0xdb
[ 2.363826] ? spin_bug+0xa6/0xb3
[ 2.364096] do_raw_spin_lock+0x6a/0x9a
[ 2.364417] mt76_dma_rx_fill+0x44/0x1de [mt76]
[ 2.364787] ? mt76_dma_kick_queue+0x18/0x18 [mt76]
[ 2.365184] mt76_dma_init+0x53/0x85 [mt76]
[ 2.365532] mt7615_dma_init+0x3d7/0x546 [mt7615e]
[ 2.365928] mt7615_register_device+0xe6/0x1a0 [mt7615e]
[ 2.366364] mt7615_mmio_probe+0x14b/0x171 [mt7615e]
[ 2.366771] mt7615_pci_probe+0x118/0x13b [mt7615e]
[ 2.367169] pci_device_probe+0xaf/0x13d
[ 2.367491] driver_probe_device+0x284/0x2ca
[ 2.367840] __driver_attach+0x7a/0x9e
[ 2.368146] ? driver_attach+0x1f/0x1f
[ 2.368451] bus_for_each_dev+0xa0/0xdb
[ 2.368765] bus_add_driver+0x132/0x204
[ 2.369078] driver_register+0x8e/0xcd
[ 2.369384] do_one_initcall+0x160/0x257
[ 2.369706] ? 0xffffffffc0240000
[ 2.369980] do_init_module+0x60/0x1bb
[ 2.370286] load_module+0x18c2/0x1a2b
[ 2.370596] ? kernel_read_file+0x141/0x1b9
[ 2.370937] ? kernel_read_file_from_fd+0x46/0x71
[ 2.371320] SyS_finit_module+0xcc/0xf0
[ 2.371636] do_syscall_64+0x6b/0xf7
[ 2.371930] entry_SYSCALL_64_after_hwframe+0x3d/0xa2
[ 2.372344] RIP: 0033:0x7da218ae4199
[ 2.372637] RSP: 002b:
00007fffd0608398 EFLAGS:
00000246 ORIG_RAX:
0000000000000139
[ 2.373252] RAX:
ffffffffffffffda RBX:
00005a705449df90 RCX:
00007da218ae4199
[ 2.373833] RDX:
0000000000000000 RSI:
00005a7052e73bd8 RDI:
0000000000000006
[ 2.374411] RBP:
00007fffd06083e0 R08:
0000000000000000 R09:
00005a705449d540
[ 2.374989] R10:
0000000000000006 R11:
0000000000000246 R12:
0000000000000000
[ 2.375569] R13:
00005a705449def0 R14:
00005a7052e73bd8 R15:
0000000000000000
Reported-by: Sean Wang <sean.wang@mediatek.com>
Fixes: bf3cb1b30b9c ("mt76: add HE phy modes and hardware queue")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
struct mt76_dev *dev = dev_get_drvdata(s->private);
int i, queued;
- for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
+ mt76_for_each_q_rx(dev, i) {
struct mt76_queue *q = &dev->q_rx[i];
if (!q->ndesc)
init_dummy_netdev(&dev->napi_dev);
- for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
+ mt76_for_each_q_rx(dev, i) {
netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll,
64);
mt76_dma_rx_fill(dev, &dev->q_rx[i]);
for (i = 0; i < ARRAY_SIZE(dev->q_tx); i++)
mt76_dma_tx_cleanup(dev, i, true);
- for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
+ mt76_for_each_q_rx(dev, i) {
netif_napi_del(&dev->napi[i]);
mt76_dma_rx_cleanup(dev, &dev->q_rx[i]);
}
#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
+#define mt76_for_each_q_rx(dev, i) \
+ for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \
+ (dev)->q_rx[i].ndesc; i++)
+
struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size,
const struct ieee80211_ops *ops,
const struct mt76_driver_ops *drv_ops);
for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, i, true);
- for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++)
+ mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i);
+ }
mt7603_dma_sched_reset(dev);
for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, i, true);
- for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++)
+ mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i);
+ }
mt76_set(dev, MT_WPDMA_GLO_CFG,
MT_WPDMA_GLO_CFG_RX_DMA_EN | MT_WPDMA_GLO_CFG_TX_DMA_EN |
napi_disable(&mdev->tx_napi);
tasklet_kill(&mdev->tx_tasklet);
- for (i = 0; i < ARRAY_SIZE(mdev->q_rx); i++)
+ mt76_for_each_q_rx(mdev, i) {
napi_disable(&mdev->napi[i]);
+ }
tasklet_kill(&dev->irq_tasklet);
mt7615_dma_reset(dev);
return 0;
restore:
- for (i = 0; i < ARRAY_SIZE(mdev->q_rx); i++)
+ mt76_for_each_q_rx(mdev, i) {
napi_enable(&mdev->napi[i]);
+ }
napi_enable(&mdev->tx_napi);
if (hif_suspend)
mt7615_mcu_set_hif_suspend(dev, false);
if (pdma_reset)
dev_err(mdev->dev, "PDMA engine must be reinitialized\n");
- for (i = 0; i < ARRAY_SIZE(mdev->q_rx); i++) {
+ mt76_for_each_q_rx(mdev, i) {
napi_enable(&mdev->napi[i]);
napi_schedule(&mdev->napi[i]);
}
for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, i, true);
- for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++)
+ mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i);
+ }
mt76x02_mac_start(dev);
for (i = 0; i < __MT_TXQ_MAX; i++)
mt76_queue_tx_cleanup(dev, i, true);
- for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++)
+ mt76_for_each_q_rx(&dev->mt76, i) {
mt76_queue_rx_reset(dev, i);
+ }
/* re-init prefetch settings after reset */
mt7915_dma_prefetch(dev);