dmaengine: stm32-mdma: use Link Address Register to compute residue

commit a4b306eb83579c07b63dc65cd5bae53b7b4019d0 upstream.

Current implementation relies on curr_hwdesc index. But to keep this index
up to date, Block Transfer interrupt (BTIE) has to be enabled.
If it is not, curr_hwdesc is not updated, and then residue is not reliable.
Rely on Link Address Register instead. And disable BTIE interrupt
in stm32_mdma_setup_xfer() because it is no more needed in case of
_prep_slave_sg() to maintain curr_hwdesc up to date.
It avoids extra interrupts and also ensures a reliable residue. These
improvements are required for STM32 DCMI camera capture use case, which
need STM32 DMA and MDMA chaining for good performance.

Fixes: 696874322771 ("dmaengine: stm32-mdma: add support to be triggered by STM32 DMA")
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231004163531.2864160-2-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index a815833a701eee4a74dcb7c55f312dc5bcfd95ea..de213b47e65081510dea0ab8383fbfd21ab1f2e0 100644 (file)
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -778,8 +778,6 @@ static int stm32_mdma_setup_xfer(struct stm32_mdma_chan *chan,
        /* Enable interrupts */
        ccr &= ~STM32_MDMA_CCR_IRQ_MASK;
        ccr |= STM32_MDMA_CCR_TEIE | STM32_MDMA_CCR_CTCIE;
-       if (sg_len > 1)
-               ccr |= STM32_MDMA_CCR_BTIE;
        desc->ccr = ccr;
 
        return 0;
@@ -1325,12 +1323,21 @@ static size_t stm32_mdma_desc_residue(struct stm32_mdma_chan *chan,
 {
        struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan);
        struct stm32_mdma_hwdesc *hwdesc;
-       u32 cbndtr, residue, modulo, burst_size;
+       u32 cisr, clar, cbndtr, residue, modulo, burst_size;
        int i;
 
+       cisr = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id));
+
        residue = 0;
-       for (i = curr_hwdesc + 1; i < desc->count; i++) {
+       /* Get the next hw descriptor to process from current transfer */
+       clar = stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id));
+       for (i = desc->count - 1; i >= 0; i--) {
                hwdesc = desc->node[i].hwdesc;
+
+               if (hwdesc->clar == clar)
+                       break;/* Current transfer found, stop cumulating */
+
+               /* Cumulate residue of unprocessed hw descriptors */
                residue += STM32_MDMA_CBNDTR_BNDT(hwdesc->cbndtr);
        }
        cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id));