drm/i915/gvt: Enable device info initialization for BXT.

Initialize BXT device info as SKL/KBL.

v2: All supported platforms share the same device configuration.
    Remove the platform check by now and let is_supported_device()
    be the gate keeper.

Signed-off-by: Colin Xu <colin.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
index 22a3ddff38a3da0649ffadd9dfd2cbcc257bbf75..4e65266e7b95bbb779c9f6ba242e0c8f77a86d26 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.c
+++ b/drivers/gpu/drm/i915/gvt/gvt.c
@@ -238,18 +238,15 @@ static void init_device_info(struct intel_gvt *gvt)
        struct intel_gvt_device_info *info = &gvt->device_info;
        struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
 
-       if (IS_BROADWELL(gvt->dev_priv) || IS_SKYLAKE(gvt->dev_priv)
-               || IS_KABYLAKE(gvt->dev_priv)) {
-               info->max_support_vgpus = 8;
-               info->cfg_space_size = PCI_CFG_SPACE_EXP_SIZE;
-               info->mmio_size = 2 * 1024 * 1024;
-               info->mmio_bar = 0;
-               info->gtt_start_offset = 8 * 1024 * 1024;
-               info->gtt_entry_size = 8;
-               info->gtt_entry_size_shift = 3;
-               info->gmadr_bytes_in_cmd = 8;
-               info->max_surface_size = 36 * 1024 * 1024;
-       }
+       info->max_support_vgpus = 8;
+       info->cfg_space_size = PCI_CFG_SPACE_EXP_SIZE;
+       info->mmio_size = 2 * 1024 * 1024;
+       info->mmio_bar = 0;
+       info->gtt_start_offset = 8 * 1024 * 1024;
+       info->gtt_entry_size = 8;
+       info->gtt_entry_size_shift = 3;
+       info->gmadr_bytes_in_cmd = 8;
+       info->max_surface_size = 36 * 1024 * 1024;
        info->msi_cap_offset = pdev->msi_cap;
 }