KVM: x86/cpuid: Refactor host/guest CPU model consistency check

For the same purpose, the leagcy intel_pmu_lbr_is_compatible() can be
renamed for reuse by more callers, and remove the comment about LBR
use case can be deleted by the way.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Message-Id: <20220411101946.20262-17-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 8a770b481d9de0c7853f4baf86993e527afb9439..ac72aabba981b325392ebd39148f06061d87dd41 100644 (file)
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -145,6 +145,11 @@ static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
        return x86_model(best->eax);
 }
 
+static inline bool cpuid_model_is_consistent(struct kvm_vcpu *vcpu)
+{
+       return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
+}
+
 static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
 {
        struct kvm_cpuid_entry2 *best;

diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 83d1081cbd3ca7deb215555f5688028082495b6a..ca219a54a53e21a2c10a25041a4579b8a9b8d245 100644 (file)
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -167,16 +167,6 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)
        return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);
 }
 
-bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu)
-{
-       /*
-        * As a first step, a guest could only enable LBR feature if its
-        * cpu model is the same as the host because the LBR registers
-        * would be pass-through to the guest and they're model specific.
-        */
-       return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
-}
-
 bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
 {
        struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
@@ -595,7 +585,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
        nested_vmx_pmu_refresh(vcpu,
                               intel_is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL));
 
-       if (intel_pmu_lbr_is_compatible(vcpu))
+       if (cpuid_model_is_consistent(vcpu))
                x86_perf_get_lbr(&lbr_desc->records);
        else
                lbr_desc->records.nr = 0;

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d5ec0635ccd4884995e852fad9e4c5d8a5dac879..403a8834cc79f20684bf90a7bf53c3ca206f58bb 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2242,7 +2242,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                        if ((data & PMU_CAP_LBR_FMT) !=
                            (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT))
                                return 1;
-                       if (!intel_pmu_lbr_is_compatible(vcpu))
+                       if (!cpuid_model_is_consistent(vcpu))
                                return 1;
                }
                ret = kvm_set_msr_common(vcpu, msr_info);

diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 2d6d7870a974bc6fd766a4321e29b17295151a96..71bcb486e73fedcfebb20b7811ab731c7bc3b695 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -95,7 +95,6 @@ union vmx_exit_reason {
 #define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records)
 
 void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu);
-bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu);
 bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);
 
 int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu);