drm/i915: Try hard to bind the context

It is not acceptable for context pinning to fail with -ENOSPC as we
should always be able to make space in the GGTT. The only reason we may
fail is that other "temporary" context pins are reserving their space
and we need to wait for an available slot.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/676
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191205113726.413351-2-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index c5e52ad394633e65007cf6f2de39e167964b7b02..61c39e943f694395e911e035ba0b9f82b6d2a97b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -113,13 +113,10 @@ void intel_context_unpin(struct intel_context *ce)
 
 static int __context_pin_state(struct i915_vma *vma)
 {
-       u64 flags;
+       unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
        int err;
 
-       flags = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
-       flags |= PIN_HIGH | PIN_GLOBAL;
-
-       err = i915_vma_pin(vma, 0, 0, flags);
+       err = i915_ggtt_pin(vma, 0, bias | PIN_HIGH);
        if (err)
                return err;
 

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 10b3d6d44045e24a2adeb5181a154ce621480832..4da1dfe11007498c75ba7d09daf64cbe1a6fc712 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1934,9 +1934,7 @@ int gen6_ppgtt_pin(struct i915_ppgtt *base)
         * size. We allocate at the top of the GTT to avoid fragmentation.
         */
        if (!atomic_read(&ppgtt->pin_count)) {
-               err = i915_vma_pin(ppgtt->vma,
-                                  0, GEN6_PD_ALIGN,
-                                  PIN_GLOBAL | PIN_HIGH);
+               err = i915_ggtt_pin(ppgtt->vma, GEN6_PD_ALIGN, PIN_HIGH);
        }
        if (!err)
                atomic_inc(&ppgtt->pin_count);

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 564fa97558c5225b808d8bfca620a26dd70da3a5..6db35b9dead80f0684568dcdf80a8fd0aea3ff79 100644 (file)
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -28,7 +28,9 @@
 #include "display/intel_frontbuffer.h"
 
 #include "gt/intel_engine.h"
+#include "gt/intel_engine_heartbeat.h"
 #include "gt/intel_gt.h"
+#include "gt/intel_gt_requests.h"
 
 #include "i915_drv.h"
 #include "i915_globals.h"
@@ -939,6 +941,38 @@ err_pages:
        return err;
 }
 
+static void flush_idle_contexts(struct intel_gt *gt)
+{
+       struct intel_engine_cs *engine;
+       enum intel_engine_id id;
+
+       for_each_engine(engine, gt, id)
+               intel_engine_flush_barriers(engine);
+
+       intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
+}
+
+int i915_ggtt_pin(struct i915_vma *vma, u32 align, unsigned int flags)
+{
+       struct i915_address_space *vm = vma->vm;
+       int err;
+
+       GEM_BUG_ON(!i915_vma_is_ggtt(vma));
+
+       do {
+               err = i915_vma_pin(vma, 0, align, flags | PIN_GLOBAL);
+               if (err != -ENOSPC)
+                       return err;
+
+               /* Unlike i915_vma_pin, we don't take no for an answer! */
+               flush_idle_contexts(vm->gt);
+               if (mutex_lock_interruptible(&vm->mutex) == 0) {
+                       i915_gem_evict_vm(vm);
+                       mutex_unlock(&vm->mutex);
+               }
+       } while (1);
+}
+
 void i915_vma_close(struct i915_vma *vma)
 {
        struct intel_gt *gt = vma->vm->gt;

diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index f09f4f513c4123a7092dfa4f70231e44b7269be1..0e0b61c24551a7032fdcffd5432f0f772bd2e06f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -352,6 +352,7 @@ static inline void i915_vma_unlock(struct i915_vma *vma)
 
 int __must_check
 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags);
+int i915_ggtt_pin(struct i915_vma *vma, u32 align, unsigned int flags);
 
 static inline int i915_vma_pin_count(const struct i915_vma *vma)
 {