#define MTK_PERICFG_REG_NIC_CFG_CON_V2 0x0c10
#define MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF GENMASK(3, 0)
#define MTK_PERICFG_BIT_NIC_CFG_CON_RMII 1
+#define MTK_PERICFG_BIT_NIC_CFG_CON_CLK BIT(0)
+#define MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2 BIT(8)
/* Represents the actual structure of descriptors used by the MAC. We can
* reuse the same structure for both TX and RX - the layout is the same, only
int speed;
int duplex;
int pause;
+ bool rmii_rxc;
const struct mtk_star_compat *compat_data;
return -ENODEV;
}
+ priv->rmii_rxc = of_property_read_bool(of_node, "mediatek,rmii-rxc");
+
if (priv->compat_data->set_interface_mode) {
ret = priv->compat_data->set_interface_mode(ndev);
if (ret) {
{
struct mtk_star_priv *priv = netdev_priv(ndev);
struct device *dev = mtk_star_get_dev(priv);
- unsigned int intf_val;
+ unsigned int intf_val, ret, rmii_rxc;
switch (priv->phy_intf) {
case PHY_INTERFACE_MODE_RMII:
intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
+ rmii_rxc = priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK;
break;
default:
dev_err(dev, "This interface not supported\n");
return -EINVAL;
}
+ ret = regmap_update_bits(priv->pericfg,
+ MTK_PERICFG_REG_NIC_CFG1_CON,
+ MTK_PERICFG_BIT_NIC_CFG_CON_CLK,
+ rmii_rxc);
+ if (ret)
+ return ret;
+
return regmap_update_bits(priv->pericfg,
MTK_PERICFG_REG_NIC_CFG0_CON,
MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
switch (priv->phy_intf) {
case PHY_INTERFACE_MODE_RMII:
intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
+ intf_val |= priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2;
break;
default:
dev_err(dev, "This interface not supported\n");
return regmap_update_bits(priv->pericfg,
MTK_PERICFG_REG_NIC_CFG_CON_V2,
- MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
+ MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF |
+ MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2,
intf_val);
}