fix(versal-net): correct aff level for cpu off

CPU suspend is calling validate_power_state PSCI opps which returns
power domain state for CPU suspend according to PSTATE type. In case of
power down it assigns PLAT_MAX_OFF_STATE to all affinity level which is
incorrect since for CPU suspend we need to set only MPIDR_AFFLVL0 which
is CPU state. So correct affinity level for CPU suspend.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I39f92790ea74e4cab8e87342e73e1ac211a46fcd

diff --git a/plat/xilinx/versal_net/plat_psci_pm.c b/plat/xilinx/versal_net/plat_psci_pm.c
index c713061840b906c4e4798c850ddfd01b7c0c4f82..9d401a507e3cf5ddc6ae0945e6cb8035b107b2ba 100644 (file)
--- a/plat/xilinx/versal_net/plat_psci_pm.c
+++ b/plat/xilinx/versal_net/plat_psci_pm.c
@@ -196,7 +196,6 @@ static int32_t versal_net_validate_power_state(unsigned int power_state,
        VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
 
        int32_t pstate = psci_get_pstate_type(power_state);
-       uint64_t i;
 
        assert(req_state);
 
@@ -204,8 +203,7 @@ static int32_t versal_net_validate_power_state(unsigned int power_state,
        if (pstate == PSTATE_TYPE_STANDBY) {
                req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
        } else {
-               for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
-                       req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
+               req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
        }
 
        /* We expect the 'state id' to be zero */