drm/i915: Restore GT coarse power gating workaround

The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.

Fixes: a938cc445c83 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191114152621.7235-1-imre.deak@intel.com
(cherry picked from commit 980f87a2edb3e7825949ebd0a7e63ab574c20816)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 4bbf28ce29c44ebb6a18a3f75d8b21b64e2e4e42..700104b90163cb98bd969f1d5040a7f36543c6cb 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -178,8 +178,13 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
            GEN6_RC_CTL_RC6_ENABLE |
            rc6_mode);
 
-       set(uncore, GEN9_PG_ENABLE,
-           GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+       /*
+        * WaRsDisableCoarsePowerGating:skl,cnl
+        *   - Render/Media PG need to be disabled with RC6.
+        */
+       if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
+               set(uncore, GEN9_PG_ENABLE,
+                   GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
 }
 
 static void gen8_rc6_enable(struct intel_rc6 *rc6)