drm/amd/display: Fix potential integer overflow

Fix potential integer overflow by casting actual_calculated_clock_100hz
to u64, in order to give the compiler complete information about the
proper arithmetic to use.

Notice that such variable is used in a context that expects
an expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arithmetic:

actual_calculated_clock_100hz * post_divider

Fixes: 164e1a8ae6a5 ("drm/amd/display: fix 64bit division issue on 32bit OS")
Addresses-Coverity-ID: 1501691 ("Unintentional integer overflow")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index bc942725b9d84c66965e5df199e0c1eef7d95f57..dec58b3c42e4d52badf8054933f43a18f5b19706 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -240,7 +240,7 @@ static bool calc_fb_divider_checking_tolerance(
                pll_settings->calculated_pix_clk_100hz =
                        actual_calculated_clock_100hz;
                pll_settings->vco_freq =
-                       div_u64(actual_calculated_clock_100hz * post_divider, 10);
+                       div_u64((u64)actual_calculated_clock_100hz * post_divider, 10);
                return true;
        }
        return false;