int dram_init_banksize(void)
{
- size_t top = min((unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE),
- (unsigned long)(gd->ram_top));
+ size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
+ size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
#ifdef CONFIG_ARM64
/* Reserve 0x200000 for ATF bl31 */
gd->bd->bi_dram[0].start = 0x200000;
gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+
+ /* Add usable memory beyond the blob of space for peripheral near 4GB */
+ if (ram_top > SZ_4G && top < SZ_4G) {
+ gd->bd->bi_dram[1].start = SZ_4G;
+ gd->bd->bi_dram[1].size = ram_top - gd->bd->bi_dram[1].start;
+ }
#else
#ifdef CONFIG_SPL_OPTEE_IMAGE
struct tos_parameter_t *tos_parameter;
* 2. update board_get_usable_ram_top() and dram_init_banksize()
* to reserve memory for peripheral space after previous update.
*/
- if (size_mb > (SDRAM_MAX_SIZE >> 20))
+ if (!IS_ENABLED(CONFIG_ARM64) && size_mb > (SDRAM_MAX_SIZE >> 20))
size_mb = (SDRAM_MAX_SIZE >> 20);
return (size_t)size_mb << 20;