]> git.baikalelectronics.ru Git - kernel.git/commitdiff
arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage
authorMaxime Ripard <maxime@cerno.tech>
Sun, 28 Jun 2020 18:08:04 +0000 (20:08 +0200)
committerMaxime Ripard <maxime@cerno.tech>
Thu, 16 Jul 2020 08:10:30 +0000 (10:10 +0200)
Now that the IOMMU driver has been introduced, it prevents any access from
a DMA master going through it that hasn't properly mapped the pages, and
that link is set up through the iommus property.

Unfortunately we forgot to add that property to the video engine node when
adding the IOMMU node, so now any DMA access is broken.

Fixes: 02da21c8bacb ("arm64: dts: allwinner: h6: Add IOMMU")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200628180804.79026-1-maxime@cerno.tech
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

index 526593c8c614a06745005eaee14c8b47ba71bf92..4cc1a670c98601bd3b2f30eb265547568466956b 100644 (file)
@@ -47,6 +47,9 @@ properties:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     description: Phandle to the device SRAM
 
+  iommus:
+    maxItems: 1
+
   memory-region:
     description:
       CMA pool to use for buffers allocation instead of the default
index 78b1361dfbb963b3fd94c92cd714df99dd488203..9ce78a7b117d20e26441eda4da6b0987c13975ba 100644 (file)
                        resets = <&ccu RST_BUS_VE>;
                        interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                        allwinner,sram = <&ve_sram 1>;
+                       iommus = <&iommu 3>;
                };
 
                gpu: gpu@1800000 {