]> git.baikalelectronics.ru Git - kernel.git/commitdiff
clk: imx93: add SAI IPG clk
authorPeng Fan <peng.fan@nxp.com>
Tue, 30 Aug 2022 03:31:37 +0000 (11:31 +0800)
committerAbel Vesa <abel.vesa@linaro.org>
Mon, 19 Sep 2022 10:06:45 +0000 (13:06 +0300)
The clk topology is as below:
bus_aon_root------>\                  /--->SAI IPG
                    -->SAI LPCG gate-->
sai[x]_clk_root--->/                  \--->SAI MCLK

So use shared count as i.MX93 MU_B gate.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220830033137.4149542-9-peng.fan@oss.nxp.com
drivers/clk/imx/clk-imx93.c

index 79ec46a91ed8576fb7c65cabb8e1c63e04610a41..f6a9e7718418efa4c44c9e79033c5defb0244669 100644 (file)
@@ -28,6 +28,9 @@ enum clk_sel {
        MAX_SEL
 };
 
+static u32 share_count_sai1;
+static u32 share_count_sai2;
+static u32 share_count_sai3;
 static u32 share_count_mub;
 
 static const char *parent_names[MAX_SEL][4] = {
@@ -215,9 +218,12 @@ static const struct imx93_clk_ccgr {
        { IMX93_CLK_USDHC1_GATE,        "usdhc1",       "usdhc1_root",          0x9380, },
        { IMX93_CLK_USDHC2_GATE,        "usdhc2",       "usdhc2_root",          0x93c0, },
        { IMX93_CLK_USDHC3_GATE,        "usdhc3",       "usdhc3_root",          0x9400, },
-       { IMX93_CLK_SAI1_GATE,          "sai1",         "sai1_root",            0x9440, },
-       { IMX93_CLK_SAI2_GATE,          "sai2",         "sai2_root",            0x9480, },
-       { IMX93_CLK_SAI3_GATE,          "sai3",         "sai3_root",            0x94c0, },
+       { IMX93_CLK_SAI1_GATE,          "sai1",         "sai1_root",            0x9440, 0, &share_count_sai1},
+       { IMX93_CLK_SAI1_IPG,           "sai1_ipg_clk", "bus_aon_root",         0x9440, 0, &share_count_sai1},
+       { IMX93_CLK_SAI2_GATE,          "sai2",         "sai2_root",            0x9480, 0, &share_count_sai2},
+       { IMX93_CLK_SAI2_IPG,           "sai2_ipg_clk", "bus_wakeup_root",      0x9480, 0, &share_count_sai2},
+       { IMX93_CLK_SAI3_GATE,          "sai3",         "sai3_root",            0x94c0, 0, &share_count_sai3},
+       { IMX93_CLK_SAI3_IPG,           "sai3_ipg_clk", "bus_wakeup_root",      0x94c0, 0, &share_count_sai3},
        { IMX93_CLK_MIPI_CSI_GATE,      "mipi_csi",     "media_apb_root",       0x9580, },
        { IMX93_CLK_MIPI_DSI_GATE,      "mipi_dsi",     "media_apb_root",       0x95c0, },
        { IMX93_CLK_LVDS_GATE,          "lvds",         "media_ldb_root",       0x9600, },