]> git.baikalelectronics.ru Git - kernel.git/commitdiff
dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
authorJordan Crouse <jcrouse@codeaurora.org>
Fri, 19 Apr 2019 19:56:27 +0000 (13:56 -0600)
committerRob Clark <robdclark@chromium.org>
Sun, 21 Apr 2019 14:36:54 +0000 (07:36 -0700)
Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Documentation/devicetree/bindings/display/msm/gpu.txt

index aad1aef682f7a56933096fa1af638ae3842d8779..c04614c63ea9e59023f915b78b1cb900b2cd669a 100644 (file)
@@ -22,6 +22,8 @@ Required properties:
    - qcom,adreno-630.2
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnects: optional phandle to an interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
 - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
   control the power for the GPU. Applicable targets:
     - qcom,adreno-630.2
@@ -70,6 +72,8 @@ Example a6xx (with GMU):
 
                operating-points-v2 = <&gpu_opp_table>;
 
+               interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
                qcom,gmu = <&gmu>;
        };
 };