]> git.baikalelectronics.ru Git - kernel.git/commitdiff
MIPS16e2: Provide feature overrides for non-MIPS16 systems
authorMaciej W. Rozycki <macro@imgtec.com>
Tue, 23 May 2017 12:40:23 +0000 (13:40 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 11 Jul 2017 12:13:06 +0000 (14:13 +0200)
Hardcode the absence of the MIPS16e2 ASE for all the systems that do so
for the MIPS16 ASE already, providing for code to be optimized away.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16097/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
16 files changed:
arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h

index ade0356df2570cc2b0ae287c9dc95e45f82b3870..e6a8108cde4e508afa0e2e29822885d0fc0a72d4 100644 (file)
@@ -40,6 +40,7 @@
 #endif
 
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index c5b6eef0efa7b8477ef062953d243a9507d0986d..bace5b9ae4df27e1b419095305f08790cdd296ec 100644 (file)
@@ -31,6 +31,7 @@
 #define cpu_has_ejtag                  1
 #define cpu_has_llsc                   1
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index bc1167dbd4e39a82b09feccd512f133196046a7a..b56cf10b91d33f840be42aa1b9d71f3dc5095d12 100644 (file)
@@ -19,6 +19,7 @@
 #define cpu_has_ejtag                  1
 #define cpu_has_llsc                   1
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index 30c5cd9fd9733d798a6d49e45131989a067e1089..291fe90aafa5d76e2fa67309e25f9117ccba571f 100644 (file)
@@ -37,6 +37,7 @@
 #endif
 
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_mdmx           0
 #define cpu_has_mips3d         0
 #define cpu_has_smartmips      0
index 21eae03d752aa695bb841c755e31f20a5ca8a972..2ec10237688c6ef6cbbc5aee7c6a26d952441318 100644 (file)
@@ -27,6 +27,7 @@
 #define cpu_has_mcheck                 0
 #define cpu_has_ejtag                  0
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index 9b19b72dba56ff04442480cfe0fe0af3c0edb5f2..b80d5eafc9dbc8659c1af09280e6d801b96d7f9c 100644 (file)
@@ -19,6 +19,7 @@
 #define cpu_has_32fpr          1
 #define cpu_has_counter                1
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_divec          0
 #define cpu_has_cache_cdex_p   1
 #define cpu_has_prefetch       0
index 7449794eade6c7c4a67787e514416861968e9d1b..136d6d464e3206515a4bb0d9f9aa6f2520da3f30 100644 (file)
@@ -43,6 +43,7 @@
 #define cpu_has_ejtag                  0
 #define cpu_has_llsc                   1
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index 4cec06d133db238b785816bb9c0488e7caf3cd15..ba8b4e30b3e27ee45b470f8889d5afac3191f6c9 100644 (file)
@@ -16,6 +16,7 @@
  */
 #define cpu_has_watch          1
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_divec          0
 #define cpu_has_vce            0
 #define cpu_has_cache_cdex_p   0
index 241409b78ff1c86f86a19f1eb09727387419ffd2..63b4c889094b157ed8cf2b4aa514beee4ec426bb 100644 (file)
@@ -29,6 +29,7 @@
 #define cpu_has_32fpr          1
 #define cpu_has_counter                1
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_vce            0
 #define cpu_has_cache_cdex_s   0
 #define cpu_has_mcheck         0
index 0933f94a1e69787f19a81beb2aa84028e86bb5fe..7c5e576f9d964a70403ac3f3c3994f30b33c763d 100644 (file)
@@ -23,6 +23,7 @@
 #define cpu_has_ejtag 1
 #define cpu_has_llsc           1
 #define cpu_has_mips16 0
+#define cpu_has_mips16e2       0
 #define cpu_has_mdmx 0
 #define cpu_has_mips3d 0
 #define cpu_has_smartmips 0
index 89328a3d44d8556c5ac340dd6c5e22507ecfd66a..581915ce231c7c522d7080d2c3afcb86c1c67b73 100644 (file)
@@ -32,6 +32,7 @@
 #define cpu_has_mcheck         0
 #define cpu_has_mdmx           0
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_mips3d         0
 #define cpu_has_mipsmt         0
 #define cpu_has_smartmips      0
index 091deb1700e5ed013ffcbbbc5af4c742537c4919..0c29ff820bb9abc1464858a97ba8604a06843e53 100644 (file)
@@ -13,6 +13,7 @@
 #define cpu_has_4k_cache       1
 #define cpu_has_watch          1
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_counter                1
 #define cpu_has_divec          1
 #define cpu_has_vce            0
index b15307597ee392c0cf57225e70655e33c97f1fdc..6a1087ee8c6ed67e1742a92eaecfb9f784ef7b83 100644 (file)
@@ -48,6 +48,7 @@
 #define cpu_has_llsc                   1
 
 #define cpu_has_mips16                 0
+#define cpu_has_mips16e2               0
 #define cpu_has_mdmx                   0
 #define cpu_has_mips3d                 0
 #define cpu_has_smartmips              0
index d38be668e3381c826db2f92e6430a250891c1513..e1e182300feaa67315d4fd5bd6e3444182b26b9d 100644 (file)
@@ -17,6 +17,7 @@
 #define cpu_has_counter                1
 #define cpu_has_watch          0
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_divec          0
 #define cpu_has_cache_cdex_p   1
 #define cpu_has_prefetch       0
index 92927b62b5a0709a92394c0dc63028c343d235b8..7022358057fd824e04c23a668331ec535f4d04fd 100644 (file)
@@ -13,6 +13,7 @@
  */
 #define cpu_has_watch          1
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_divec          1
 #define cpu_has_vce            0
 #define cpu_has_cache_cdex_p   0
index 7f5144c6ce2da590a0ffc88ce50d5350077a8628..b9d39dc45420b591af3342200782c05409a21731 100644 (file)
@@ -6,6 +6,7 @@
 #define cpu_has_inclusive_pcaches      0
 
 #define cpu_has_mips16         0
+#define cpu_has_mips16e2       0
 #define cpu_has_mdmx           0
 #define cpu_has_mips3d         0
 #define cpu_has_smartmips      0