drm/mipi-dbi: align max_chunk to 2 in spi_transfer

In __spi_validate, there's a validation that no partial transfers
are accepted (xfer->len % w_size must be zero). When
max_chunk is not a multiple of bpw (e.g. max_chunk = 65535,
bpw = 16), the transfer will be rejected.

This patch aligns max_chunk to 2 bytes (the maximum value of bpw is 16),
so that no partial transfer will occur.

Fixes: ecdffcc97ac3 ("drm/tinydrm: Move tinydrm_spi_transfer()")
Signed-off-by: Yunhao Tian <t123yh.xyz@gmail.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220510030219.2486687-1-t123yh.xyz@gmail.com

diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c
index 9314f2ead79fe01e932b23a14a54b627f8468b12..09e4edb5a99275a5e79fa78515d2e2b6a59cc998 100644 (file)
--- a/drivers/gpu/drm/drm_mipi_dbi.c
+++ b/drivers/gpu/drm/drm_mipi_dbi.c
@@ -1199,6 +1199,13 @@ int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
        size_t chunk;
        int ret;
 
+       /* In __spi_validate, there's a validation that no partial transfers
+        * are accepted (xfer->len % w_size must be zero).
+        * Here we align max_chunk to multiple of 2 (16bits),
+        * to prevent transfers from being rejected.
+        */
+       max_chunk = ALIGN_DOWN(max_chunk, 2);
+
        spi_message_init_with_transfers(&m, &tr, 1);
 
        while (len) {