csky: Fixup swapon

Current csky's swappon is broken by wrong swap PTE entry format.
Now redesign the new format for abiv1 & abiv2 and make swappon +
zram work properly on csky machines.

C-SKY PTE has VALID, DIRTY to emulate PRESENT, READ, WRITE, EXEC
attributes. GLOBAL bit is shared by two pages in the same tlb
entry. So we need to keep GLOBAL, VALID, PRESENT zero in swp_pte.

To distinguish PAGE_NONE and swp_pte, we need to use an additional
bit (abiv1 is _PAGE_READ, abiv2 is _PAGE_WRITE).

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/csky/abiv1/inc/abi/pgtable-bits.h b/arch/csky/abiv1/inc/abi/pgtable-bits.h
index 6583333b2b0c2d0db46ca4282c93541abc44c8a3..50ebe9c2809558a6bb73418968c0772acf63a866 100644 (file)
--- a/arch/csky/abiv1/inc/abi/pgtable-bits.h
+++ b/arch/csky/abiv1/inc/abi/pgtable-bits.h
@@ -24,6 +24,28 @@
 #define _CACHE_CACHED          _PAGE_CACHE
 #define _CACHE_UNCACHED                _PAGE_UNCACHE
 
+#define _PAGE_PROT_NONE                _PAGE_READ
+
+/*
+ * Encode and decode a swap entry
+ *
+ * Format of swap PTE:
+ *     bit          0:    _PAGE_PRESENT (zero)
+ *     bit          1:    _PAGE_READ (zero)
+ *     bit      2 - 5:    swap type[0 - 3]
+ *     bit          6:    _PAGE_GLOBAL (zero)
+ *     bit          7:    _PAGE_VALID (zero)
+ *     bit          8:    swap type[4]
+ *     bit     9 - 31:    swap offset
+ */
+#define __swp_type(x)                  ((((x).val >> 2) & 0xf) | \
+                                       (((x).val >> 4) & 0x10))
+#define __swp_offset(x)                        ((x).val >> 9)
+#define __swp_entry(type, offset)      ((swp_entry_t) { \
+                                       ((type & 0xf) << 2) | \
+                                       ((type & 0x10) << 4) | \
+                                       ((offset) << 9)})
+
 #define HAVE_ARCH_UNMAPPED_AREA
 
 #endif /* __ASM_CSKY_PGTABLE_BITS_H */

diff --git a/arch/csky/abiv2/inc/abi/pgtable-bits.h b/arch/csky/abiv2/inc/abi/pgtable-bits.h
index 09303dbc89a6da41b6819833713e05fefcccc9b0..5b27eaf18aa857273f777702966c712a39280bb4 100644 (file)
--- a/arch/csky/abiv2/inc/abi/pgtable-bits.h
+++ b/arch/csky/abiv2/inc/abi/pgtable-bits.h
@@ -24,4 +24,26 @@
 #define _CACHE_CACHED          (_PAGE_CACHE | _PAGE_BUF)
 #define _CACHE_UNCACHED                (0)
 
+#define _PAGE_PROT_NONE                _PAGE_WRITE
+
+/*
+ * Encode and decode a swap entry
+ *
+ * Format of swap PTE:
+ *     bit          0:    _PAGE_GLOBAL (zero)
+ *     bit          1:    _PAGE_VALID (zero)
+ *     bit      2 - 6:    swap type
+ *     bit      7 - 8:    swap offset[0 - 1]
+ *     bit          9:    _PAGE_WRITE (zero)
+ *     bit         10:    _PAGE_PRESENT (zero)
+ *     bit    11 - 31:    swap offset[2 - 22]
+ */
+#define __swp_type(x)                  (((x).val >> 2) & 0x1f)
+#define __swp_offset(x)                        ((((x).val >> 7) & 0x3) | \
+                                       (((x).val >> 9) & 0x7ffffc))
+#define __swp_entry(type, offset)      ((swp_entry_t) { \
+                                       ((type & 0x1f) << 2) | \
+                                       ((offset & 0x3) << 7) | \
+                                       ((offset & 0x7ffffc) << 9)})
+
 #endif /* __ASM_CSKY_PGTABLE_BITS_H */

diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h
index eb39f109670dd1f11d58b43bbcd0da8ddd7f5f56..361c347cee87a2e335eaff135b5e3f55fa8e8f02 100644 (file)
--- a/arch/csky/include/asm/pgtable.h
+++ b/arch/csky/include/asm/pgtable.h
@@ -41,13 +41,6 @@
 #define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \
                                | pgprot_val(prot))
 
-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | \
-                        _CACHE_MASK)
-
-#define __swp_type(x)                  (((x).val >> 4) & 0xff)
-#define __swp_offset(x)                        ((x).val >> 12)
-#define __swp_entry(type, offset)      ((swp_entry_t) {((type) << 4) | \
-                                       ((offset) << 12) })
 #define __pte_to_swp_entry(pte)                ((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)          ((pte_t) { (x).val })
 
@@ -61,8 +54,7 @@
  */
 #define _PAGE_BASE     (_PAGE_PRESENT | _PAGE_ACCESSED)
 
-#define PAGE_NONE      __pgprot(_PAGE_BASE | \
-                               _CACHE_CACHED)
+#define PAGE_NONE      __pgprot(_PAGE_PROT_NONE)
 #define PAGE_READ      __pgprot(_PAGE_BASE | _PAGE_READ | \
                                _CACHE_CACHED)
 #define PAGE_WRITE     __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE | \
@@ -79,6 +71,13 @@
                                _PAGE_GLOBAL | \
                                _CACHE_UNCACHED | _PAGE_SO)
 
+#define _PAGE_CHG_MASK (~(unsigned long) \
+                               (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
+                               _CACHE_MASK | _PAGE_GLOBAL))
+
+#define MAX_SWAPFILES_CHECK() \
+               BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
+
 #define __P000 PAGE_NONE
 #define __P001 PAGE_READ
 #define __P010 PAGE_READ