net: ipa: define some more IPA register fields

Define the fields for the SHARED_MEM_SIZE, QSB_MAX_WRITES,
QSB_MAX_READS, FILT_ROUT_HASH_EN, and FILT_ROUT_HASH_FLUSH IPA
registers for all supported IPA versions.

Create enumerated types to identify fields for these registers.  Use
IPA_REG_FIELDS() to specify the field mask values defined for these
registers, for each supported version of IPA.

Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be
written to these registers rather than using the *_FMASK
preprocessor symbols.

Remove the definition of the now unused *_FMASK symbols.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
index b73eb2d9dccef1a30767e9cfc49bc6eeb6493960..771b5c378b30653a391f4f07d3e5cabbd31bb2ed 100644 (file)
--- a/drivers/net/ipa/ipa_main.c
+++ b/drivers/net/ipa/ipa_main.c
@@ -293,26 +293,26 @@ ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data)
        /* Max outstanding write accesses for QSB masters */
        reg = ipa_reg(ipa, QSB_MAX_WRITES);
 
-       val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK);
+       val = ipa_reg_encode(reg, GEN_QMB_0_MAX_WRITES, data0->max_writes);
        if (data->qsb_count > 1)
-               val |= u32_encode_bits(data1->max_writes,
-                                      GEN_QMB_1_MAX_WRITES_FMASK);
+               val |= ipa_reg_encode(reg, GEN_QMB_1_MAX_WRITES,
+                                     data1->max_writes);
 
        iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
 
        /* Max outstanding read accesses for QSB masters */
        reg = ipa_reg(ipa, QSB_MAX_READS);
 
-       val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK);
+       val = ipa_reg_encode(reg, GEN_QMB_0_MAX_READS, data0->max_reads);
        if (ipa->version >= IPA_VERSION_4_0)
-               val |= u32_encode_bits(data0->max_reads_beats,
-                                      GEN_QMB_0_MAX_READS_BEATS_FMASK);
+               val |= ipa_reg_encode(reg, GEN_QMB_0_MAX_READS_BEATS,
+                                     data0->max_reads_beats);
        if (data->qsb_count > 1) {
-               val |= u32_encode_bits(data1->max_reads,
-                                      GEN_QMB_1_MAX_READS_FMASK);
+               val = ipa_reg_encode(reg, GEN_QMB_1_MAX_READS,
+                                    data1->max_reads);
                if (ipa->version >= IPA_VERSION_4_0)
-                       val |= u32_encode_bits(data1->max_reads_beats,
-                                              GEN_QMB_1_MAX_READS_BEATS_FMASK);
+                       val |= ipa_reg_encode(reg, GEN_QMB_1_MAX_READS_BEATS,
+                                             data1->max_reads_beats);
        }
 
        iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
@@ -419,6 +419,10 @@ static void ipa_hardware_config_hashing(struct ipa *ipa)
 
        /* IPA v4.2 does not support hashed tables, so disable them */
        reg = ipa_reg(ipa, FILT_ROUT_HASH_EN);
+
+       /* IPV6_ROUTER_HASH, IPV6_FILTER_HASH, IPV4_ROUTER_HASH,
+        * IPV4_FILTER_HASH are all zero.
+        */
        iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
 }
 

diff --git a/drivers/net/ipa/ipa_mem.c b/drivers/net/ipa/ipa_mem.c
index a5d94027cad10044098033ddb984f77a26ce849e..0c22ea8d8ad066f1a3458c0d190966137886b0eb 100644 (file)
--- a/drivers/net/ipa/ipa_mem.c
+++ b/drivers/net/ipa/ipa_mem.c
@@ -322,9 +322,10 @@ int ipa_mem_config(struct ipa *ipa)
        val = ioread32(ipa->reg_virt + ipa_reg_offset(reg));
 
        /* The fields in the register are in 8 byte units */
-       ipa->mem_offset = 8 * u32_get_bits(val, SHARED_MEM_BADDR_FMASK);
+       ipa->mem_offset = 8 * ipa_reg_decode(reg, MEM_BADDR, val);
+
        /* Make sure the end is within the region's mapped space */
-       mem_size = 8 * u32_get_bits(val, SHARED_MEM_SIZE_FMASK);
+       mem_size = 8 * ipa_reg_decode(reg, MEM_SIZE, val);
 
        /* If the sizes don't match, issue a warning */
        if (ipa->mem_offset + mem_size < ipa->mem_size) {

diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h
index 3de1c6ed9e854cb8145d62762f462c27930fe33e..9e6a74d1c810bee546f183a84fa98abb170f0770 100644 (file)
--- a/drivers/net/ipa/ipa_reg.h
+++ b/drivers/net/ipa/ipa_reg.h
@@ -247,25 +247,32 @@ enum ipa_reg_route_field_id {
 };
 
 /* SHARED_MEM_SIZE register */
-#define SHARED_MEM_SIZE_FMASK                  GENMASK(15, 0)
-#define SHARED_MEM_BADDR_FMASK                 GENMASK(31, 16)
+enum ipa_reg_shared_mem_size_field_id {
+       MEM_SIZE,
+       MEM_BADDR,
+};
 
 /* QSB_MAX_WRITES register */
-#define GEN_QMB_0_MAX_WRITES_FMASK             GENMASK(3, 0)
-#define GEN_QMB_1_MAX_WRITES_FMASK             GENMASK(7, 4)
+enum ipa_reg_qsb_max_writes_field_id {
+       GEN_QMB_0_MAX_WRITES,
+       GEN_QMB_1_MAX_WRITES,
+};
 
 /* QSB_MAX_READS register */
-#define GEN_QMB_0_MAX_READS_FMASK              GENMASK(3, 0)
-#define GEN_QMB_1_MAX_READS_FMASK              GENMASK(7, 4)
-/* The next two fields are present for IPA v4.0+ */
-#define GEN_QMB_0_MAX_READS_BEATS_FMASK                GENMASK(23, 16)
-#define GEN_QMB_1_MAX_READS_BEATS_FMASK                GENMASK(31, 24)
+enum ipa_reg_qsb_max_reads_field_id {
+       GEN_QMB_0_MAX_READS,
+       GEN_QMB_1_MAX_READS,
+       GEN_QMB_0_MAX_READS_BEATS,                      /* IPA v4.0+ */
+       GEN_QMB_1_MAX_READS_BEATS,                      /* IPA v4.0+ */
+};
 
 /* FILT_ROUT_HASH_EN and FILT_ROUT_HASH_FLUSH registers */
-#define IPV6_ROUTER_HASH_FMASK                 GENMASK(0, 0)
-#define IPV6_FILTER_HASH_FMASK                 GENMASK(4, 4)
-#define IPV4_ROUTER_HASH_FMASK                 GENMASK(8, 8)
-#define IPV4_FILTER_HASH_FMASK                 GENMASK(12, 12)
+enum ipa_reg_rout_hash_field_id {
+       IPV6_ROUTER_HASH,
+       IPV6_FILTER_HASH,
+       IPV4_ROUTER_HASH,
+       IPV4_FILTER_HASH,
+};
 
 /* BCR register */
 enum ipa_bcr_compat {

diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c
index 04747e084226715274a464de745cba93ae28fedb..32873e6cb4ad1486f23dbcf2085b2ec6f578f292 100644 (file)
--- a/drivers/net/ipa/ipa_table.c
+++ b/drivers/net/ipa/ipa_table.c
@@ -401,8 +401,10 @@ int ipa_table_hash_flush(struct ipa *ipa)
        reg = ipa_reg(ipa, FILT_ROUT_HASH_FLUSH);
        offset = ipa_reg_offset(reg);
 
-       val = IPV4_FILTER_HASH_FMASK | IPV6_FILTER_HASH_FMASK;
-       val |= IPV6_ROUTER_HASH_FMASK | IPV4_ROUTER_HASH_FMASK;
+       val = ipa_reg_bit(reg, IPV6_ROUTER_HASH);
+       val |= ipa_reg_bit(reg, IPV6_FILTER_HASH);
+       val |= ipa_reg_bit(reg, IPV4_ROUTER_HASH);
+       val |= ipa_reg_bit(reg, IPV4_FILTER_HASH);
 
        ipa_cmd_register_write_add(trans, offset, val, val, false);
 

diff --git a/drivers/net/ipa/reg/ipa_reg-v3.1.c b/drivers/net/ipa/reg/ipa_reg-v3.1.c
index a09b61eee245b70f556011c5bd4063bfbdee9caa..fb45c94fc514b1056ffd358e5c01e5e0c0f237be 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v3.1.c
+++ b/drivers/net/ipa/reg/ipa_reg-v3.1.c
@@ -54,15 +54,53 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x000008c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x000008c);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c);

diff --git a/drivers/net/ipa/reg/ipa_reg-v3.5.1.c b/drivers/net/ipa/reg/ipa_reg-v3.5.1.c
index 4333c11a7e3d5f164b8518e068e5a4abf50b812a..4cfe203dd620753fc9bf77498a8fb63edf418605 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v3.5.1.c
+++ b/drivers/net/ipa/reg/ipa_reg-v3.5.1.c
@@ -59,15 +59,53 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x000008c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x000008c);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c);

diff --git a/drivers/net/ipa/reg/ipa_reg-v4.11.c b/drivers/net/ipa/reg/ipa_reg-v4.11.c
index 598cbdd67444ea970acce75a0b3985cbab728ed6..3230a7b33d8be78cfeb751938bf48e28dd634f0f 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v4.11.c
+++ b/drivers/net/ipa/reg/ipa_reg-v4.11.c
@@ -88,15 +88,56 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+                                               /* Bits 8-15 reserved */
+       [GEN_QMB_0_MAX_READS_BEATS]                     = GENMASK(23, 16),
+       [GEN_QMB_1_MAX_READS_BEATS]                     = GENMASK(31, 24),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);

diff --git a/drivers/net/ipa/reg/ipa_reg-v4.2.c b/drivers/net/ipa/reg/ipa_reg-v4.2.c
index dfcbd4b5a87a91b539b35780cbe44269415f4778..d4dd1081ff3847b19603840f8980fc748d892480 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v4.2.c
+++ b/drivers/net/ipa/reg/ipa_reg-v4.2.c
@@ -80,15 +80,56 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+                                               /* Bits 8-15 reserved */
+       [GEN_QMB_0_MAX_READS_BEATS]                     = GENMASK(23, 16),
+       [GEN_QMB_1_MAX_READS_BEATS]                     = GENMASK(31, 24),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);

diff --git a/drivers/net/ipa/reg/ipa_reg-v4.5.c b/drivers/net/ipa/reg/ipa_reg-v4.5.c
index 2cc20fc2fcba76d94e60187645133e6958d88234..9e669c08f06d992944a88e7a60a7708f002f92da 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v4.5.c
+++ b/drivers/net/ipa/reg/ipa_reg-v4.5.c
@@ -82,15 +82,56 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+                                               /* Bits 8-15 reserved */
+       [GEN_QMB_0_MAX_READS_BEATS]                     = GENMASK(23, 16),
+       [GEN_QMB_1_MAX_READS_BEATS]                     = GENMASK(31, 24),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);

diff --git a/drivers/net/ipa/reg/ipa_reg-v4.9.c b/drivers/net/ipa/reg/ipa_reg-v4.9.c
index 4e5f7acab1a32418dd494727dc5e9f982bf6b6c6..ea8a597f37686120057b9a638896eae5a58be510 100644 (file)
--- a/drivers/net/ipa/reg/ipa_reg-v4.9.c
+++ b/drivers/net/ipa/reg/ipa_reg-v4.9.c
@@ -87,15 +87,56 @@ static const u32 ipa_reg_route_fmask[] = {
 
 IPA_REG_FIELDS(ROUTE, route, 0x00000048);
 
-IPA_REG(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+static const u32 ipa_reg_shared_mem_size_fmask[] = {
+       [MEM_SIZE]                                      = GENMASK(15, 0),
+       [MEM_BADDR]                                     = GENMASK(31, 16),
+};
+
+IPA_REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
+
+static const u32 ipa_reg_qsb_max_writes_fmask[] = {
+       [GEN_QMB_0_MAX_WRITES]                          = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_WRITES]                          = GENMASK(7, 4),
+                                               /* Bits 8-31 reserved */
+};
 
-IPA_REG(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
+IPA_REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
 
-IPA_REG(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+static const u32 ipa_reg_qsb_max_reads_fmask[] = {
+       [GEN_QMB_0_MAX_READS]                           = GENMASK(3, 0),
+       [GEN_QMB_1_MAX_READS]                           = GENMASK(7, 4),
+                                               /* Bits 8-15 reserved */
+       [GEN_QMB_0_MAX_READS_BEATS]                     = GENMASK(23, 16),
+       [GEN_QMB_1_MAX_READS_BEATS]                     = GENMASK(31, 24),
+};
+
+IPA_REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
+
+static const u32 ipa_reg_filt_rout_hash_en_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+IPA_REG_FIELDS(FILT_ROUT_HASH_EN, filt_rout_hash_en, 0x0000148);
+
+static const u32 ipa_reg_filt_rout_hash_flush_fmask[] = {
+       [IPV6_ROUTER_HASH]                              = BIT(0),
+                                               /* Bits 1-3 reserved */
+       [IPV6_FILTER_HASH]                              = BIT(4),
+                                               /* Bits 5-7 reserved */
+       [IPV4_ROUTER_HASH]                              = BIT(8),
+                                               /* Bits 9-11 reserved */
+       [IPV4_FILTER_HASH]                              = BIT(12),
+                                               /* Bits 13-31 reserved */
+};
 
-IPA_REG(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
+IPA_REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x000014c);
 
 /* Valid bits defined by ipa->available */
 IPA_REG(STATE_AGGR_ACTIVE, state_aggr_active, 0x000000b4);