]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
fix(fvp_ve): fdts: Fix vexpress,config-bus subnode names
authorAndre Przywara <andre.przywara@arm.com>
Tue, 23 Aug 2022 09:45:54 +0000 (10:45 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Tue, 11 Oct 2022 15:11:45 +0000 (16:11 +0100)
The arm,vexpress,config-bus DT binding restricts the possible (sub)node
names.
Adjust the current node names, to drop the unneeded address specifier,
and make the node names binding compliant.

Change-Id: Ic48c6969268c960ce92c8ec3a756ed1d89e61b08
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
fdts/fvp-ve-Cortex-A5x1.dts

index 23a6e13828d6f042139c5cd3e4f037d658e27d04..612b3b2d1284376f63696cd5a3d2dd929e731be8 100644 (file)
@@ -77,7 +77,7 @@
        };
 
        mcc {
-               oscclk0: osc@0 {
+               oscclk0: oscclk0 {
                        /* CPU and internal AXI reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 0>;
@@ -86,7 +86,7 @@
                        clock-output-names = "oscclk0";
                };
 
-               oscclk1: osc@1 {
+               oscclk1: oscclk1 {
                        /* Multiplexed AXI master clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 1>;
@@ -95,7 +95,7 @@
                        clock-output-names = "oscclk1";
                };
 
-               osc@2 {
+               oscclk2 {
                        /* DDR2 */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 2>;
                        clock-output-names = "oscclk2";
                };
 
-               oscclk3: osc@3 {
+               oscclk3: oscclk3 {
                        /* HDLCD */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 3>;
                        clock-output-names = "oscclk3";
                };
 
-               osc@4 {
+               oscclk4 {
                        /* Test chip gate configuration */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 4>;
                        clock-output-names = "oscclk4";
                };
 
-               smbclk: osc@5 {
+               smbclk: oscclk5 {
                        /* SMB clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 5>;