]> git.baikalelectronics.ru Git - uboot.git/commitdiff
layerscape: Remove some unused CONFIG symbols
authorTom Rini <trini@konsulko.com>
Sat, 25 Jun 2022 15:02:34 +0000 (11:02 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 7 Jul 2022 13:29:08 +0000 (09:29 -0400)
All of these symbols are not referenced anywhere else in the code, so
remove them.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
arch/arm/include/asm/arch-ls102xa/config.h
include/configs/MPC837XERDB.h
include/configs/ids8313.h
include/configs/mx6ullevk.h

index 4b0f554e33630bd0a32f36d36618f5f4890c4e79..f2dbcdc8164fcdea6961271578392e0a49c8f708 100644 (file)
 
 #define CONFIG_SYS_DCSRBAR                     0x20000000
 #define CONFIG_SYS_DCSR_DCFG_ADDR      (CONFIG_SYS_DCSRBAR + 0x00140000)
-#define CONFIG_SYS_DCSR_COP_CCP_ADDR   (CONFIG_SYS_DCSRBAR + 0x02008040)
 
 #define CONFIG_SYS_FSL_DDR_ADDR                        (CONFIG_SYS_IMMR + 0x00080000)
-#define CONFIG_SYS_GIC400_ADDR                 (CONFIG_SYS_IMMR + 0x00400000)
 #define CONFIG_SYS_IFC_ADDR                    (CONFIG_SYS_IMMR + 0x00530000)
 #define SYS_FSL_QSPI_ADDR                      (CONFIG_SYS_IMMR + 0x00550000)
 #define CONFIG_SYS_FSL_ESDHC_ADDR              (CONFIG_SYS_IMMR + 0x00560000)
@@ -26,9 +24,7 @@
 #define CONFIG_SYS_FSL_SCFG_ADDR               (CONFIG_SYS_IMMR + 0x00570000)
 #define CONFIG_SYS_FSL_BMAN_ADDR               (CONFIG_SYS_IMMR + 0x00890000)
 #define CONFIG_SYS_FSL_QMAN_ADDR               (CONFIG_SYS_IMMR + 0x00880000)
-#define CONFIG_SYS_FSL_FMAN_ADDR               (CONFIG_SYS_IMMR + 0x00a00000)
 #define CONFIG_SYS_FSL_SERDES_ADDR             (CONFIG_SYS_IMMR + 0x00ea0000)
-#define CONFIG_SYS_FSL_DCFG_ADDR               (CONFIG_SYS_IMMR + 0x00ee0000)
 #define CONFIG_SYS_FSL_CLK_ADDR                        (CONFIG_SYS_IMMR + 0x00ee1000)
 #define CONFIG_SYS_NS16550_COM1                        (CONFIG_SYS_IMMR + 0x011c0500)
 #define CONFIG_SYS_NS16550_COM2                        (CONFIG_SYS_IMMR + 0x011c0600)
index 304cd7980a66eb72a04b8911337fa5bc4961b0f4..570397b3c04ca757c2b474bafbd2c065a4046f2c 100644 (file)
@@ -52,7 +52,6 @@
 #define CONFIG_SYS_FSL_DCSR_DDR_ADDR           0x70012c000ULL
 #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR          0x70012d000ULL
 #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR          0x700132000ULL
-#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR          0x700133000ULL
 
 #define I2C1_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x01000000)
 #define I2C2_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x01010000)
index 796e2b218e56ef10164baf6a948ce0077dbfef6b..e5f61ea4a6ee65cc3b014834a828cb7a501647d5 100644 (file)
 #define CONFIG_SYS_FSL_RCPM_ADDR               (CONFIG_SYS_IMMR + 0x00ee2000)
 #define CONFIG_SYS_NS16550_COM1                        (CONFIG_SYS_IMMR + 0x011c0500)
 #define CONFIG_SYS_NS16550_COM2                        (CONFIG_SYS_IMMR + 0x011d0500)
-#define CONFIG_SYS_DCU_ADDR                    (CONFIG_SYS_IMMR + 0x01ce0000)
 #define CONFIG_SYS_XHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
 
 #define CONFIG_SYS_FSL_SEC_OFFSET              0x00700000
 #define CONFIG_SYS_FSL_JR0_OFFSET              0x00710000
 #define CONFIG_SYS_TSEC1_OFFSET                        0x01d10000
-#define CONFIG_SYS_TSEC2_OFFSET                        0x01d50000
-#define CONFIG_SYS_TSEC3_OFFSET                        0x01d90000
 #define CONFIG_SYS_MDIO1_OFFSET                        0x01d24000
 
 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
@@ -79,8 +76,7 @@
 #define AHCI_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x02200000)
 #ifdef CONFIG_DDR_SPD
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE         ((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED                  CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
+#define CONFIG_MAX_MEM_MAPPED                  ((phys_size_t)2 << 30)
 #endif
 
 #define CONFIG_SYS_FSL_IFC_BE
index 3e4d66874df41e4725f17d42bfe4589e06d4ab9b..8517b0330f52d23189f8513afa27df743723b846 100644 (file)
 
 #ifdef CONFIG_TSEC2
 #define CONFIG_TSEC2_NAME              "TSEC1"
-#define CONFIG_SYS_TSEC2_OFFSET                0x25000
 #define TSEC2_PHY_ADDR                 0x1c
 #define TSEC2_FLAGS                    (TSEC_GIGABIT | TSEC_REDUCED)
 #define TSEC2_PHYIDX                   0
index e0994d12baf43464e5a99996341b04dbc007023b..a8bb2090ec4a227ce3e1841c5302f92c4345f543 100644 (file)
 
 #ifdef CONFIG_TSEC2
 #define CONFIG_TSEC2_NAME              "TSEC1"
-#define CONFIG_SYS_TSEC2_OFFSET        0x25000
 #define TSEC2_PHY_ADDR                 0x3
 #define TSEC2_FLAGS                    TSEC_GIGABIT
 #define TSEC2_PHYIDX                   0
index db09db44d53c62f800e165be7b2624274ac0bcd0..00cc547b900cfc0aac724cd15eedc0e90daabe2d 100644 (file)
 /* MMC Configs */
 #ifdef CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC2_BASE_ADDR
-
-/* NAND pin conflicts with usdhc2 */
-#ifdef CONFIG_SYS_USE_NAND
-#define CONFIG_SYS_FSL_USDHC_NUM       1
-#else
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #endif
-#endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "script=boot.scr\0" \