]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amdkfd: support beige_goby KFD
authorChengming Gui <Jack.Gui@amd.com>
Wed, 21 Oct 2020 10:15:36 +0000 (18:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 20 May 2021 02:40:40 +0000 (22:40 -0400)
Add KFD support for beige_goby
v2: fix asic name typo
v3: squash in updates (Alex)
v4: squash in needs_atomics fix (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdkfd/kfd_crat.c
drivers/gpu/drm/amd/amdkfd/kfd_device.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_topology.c

index c1815b708ac89ef06aeebbd4c35c6c5678040880..3251fe224f860d8bb389f6fe79a4ea95bc02802c 100644 (file)
@@ -689,6 +689,63 @@ static struct kfd_gpu_cache_info dimgrey_cavefish_cache_info[] = {
        },
 };
 
+static struct kfd_gpu_cache_info beige_goby_cache_info[] = {
+       {
+               /* TCP L1 Cache per CU */
+               .cache_size = 16,
+               .cache_level = 1,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_DATA_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 1,
+       },
+       {
+               /* Scalar L1 Instruction Cache per SQC */
+               .cache_size = 32,
+               .cache_level = 1,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_INST_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 2,
+       },
+       {
+               /* Scalar L1 Data Cache per SQC */
+               .cache_size = 16,
+               .cache_level = 1,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_DATA_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 2,
+       },
+       {
+               /* GL1 Data Cache per SA */
+               .cache_size = 128,
+               .cache_level = 1,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_DATA_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 8,
+       },
+       {
+               /* L2 Data Cache per GPU (Total Tex Cache) */
+               .cache_size = 1024,
+               .cache_level = 2,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_DATA_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 8,
+       },
+       {
+               /* L3 Data Cache per GPU */
+               .cache_size = 16*1024,
+               .cache_level = 3,
+               .flags = (CRAT_CACHE_FLAGS_ENABLED |
+                               CRAT_CACHE_FLAGS_DATA_CACHE |
+                               CRAT_CACHE_FLAGS_SIMD_CACHE),
+               .num_cu_shared = 8,
+       },
+};
+
 static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev,
                struct crat_subtype_computeunit *cu)
 {
@@ -1322,6 +1379,10 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
                pcache_info = vangogh_cache_info;
                num_of_cache_types = ARRAY_SIZE(vangogh_cache_info);
                break;
+       case CHIP_BEIGE_GOBY:
+               pcache_info = beige_goby_cache_info;
+               num_of_cache_types = ARRAY_SIZE(beige_goby_cache_info);
+               break;
        default:
                return -EINVAL;
        }
index dedb8e33b953321bb81c8eb474550954884efb61..b5e8fe8262143193ff04d86216757a12cd376d2f 100644 (file)
@@ -558,6 +558,24 @@ static const struct kfd_device_info dimgrey_cavefish_device_info = {
        .num_sdma_queues_per_engine = 8,
 };
 
+static const struct kfd_device_info beige_goby_device_info = {
+       .asic_family = CHIP_BEIGE_GOBY,
+       .asic_name = "beige_goby",
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .doorbell_size  = 8,
+       .ih_ring_entry_size = 8 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_v9,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .needs_iommu_device = false,
+       .supports_cwsr = true,
+       .needs_pci_atomics = true,
+       .num_sdma_engines = 1,
+       .num_xgmi_sdma_engines = 0,
+       .num_sdma_queues_per_engine = 8,
+};
+
 
 /* For each entry, [0] is regular and [1] is virtualisation device. */
 static const struct kfd_device_info *kfd_supported_devices[][2] = {
@@ -586,6 +604,7 @@ static const struct kfd_device_info *kfd_supported_devices[][2] = {
        [CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, &navy_flounder_device_info},
        [CHIP_VANGOGH] = {&vangogh_device_info, NULL},
        [CHIP_DIMGREY_CAVEFISH] = {&dimgrey_cavefish_device_info, &dimgrey_cavefish_device_info},
+       [CHIP_BEIGE_GOBY] = {&beige_goby_device_info, &beige_goby_device_info},
 };
 
 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
index 98c2046c733127fd7ababd122d8d52c8f946fb78..5914e38a9f7231c7aa55db1475dae688ef155fab 100644 (file)
@@ -1936,6 +1936,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
        case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_BEIGE_GOBY:
                device_queue_manager_init_v10_navi10(&dqm->asic_ops);
                break;
        default:
index 72815e86a3b8e20706ecb165e7eb1825e2486e1b..0e5f5c5daf76ffaa9643e0b7da16a999c389238b 100644 (file)
@@ -424,6 +424,7 @@ int kfd_init_apertures(struct kfd_process *process)
                        case CHIP_NAVY_FLOUNDER:
                        case CHIP_VANGOGH:
                        case CHIP_DIMGREY_CAVEFISH:
+                       case CHIP_BEIGE_GOBY:
                                kfd_init_apertures_v9(pdd, id);
                                break;
                        default:
index f688451cb299f2396c1b275186895e81c1caa101..5f10dbfa58eed0be8b793f5346d873239905c9e2 100644 (file)
@@ -249,6 +249,7 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
        case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_BEIGE_GOBY:
                pm->pmf = &kfd_v9_pm_funcs;
                break;
        case CHIP_ALDEBARAN:
index 7fae6a7e51f5b19f9b0907f43478dad7cee5d7c3..9be66ba24af9e890e24e0f5ee619e9883fded014 100644 (file)
@@ -1398,6 +1398,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
        case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_BEIGE_GOBY:
                dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);